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authorArthur Heymans <arthur@aheymans.xyz>2019-08-18 10:02:10 +0200
committerPatrick Georgi <pgeorgi@google.com>2019-10-09 22:18:57 +0000
commit3cde494000de81d56aebc2418e10603d279a567e (patch)
treed714e20dd5411b509beb1fd50eea50b9ca67dbf0 /src/cpu/intel/model_1067x
parenta31e6e84974006188baa394027eebd78a9da550c (diff)
sb/intel/bd82x6x: Remove setting up lpc decode ranges in ramstage
This is now done during the romstage. Change-Id: I7c1a848ae871ffb73c09ee88f96331d6b823e39d Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34978 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Diffstat (limited to 'src/cpu/intel/model_1067x')
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