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authorStefan Reinauer <reinauer@chromium.org>2012-10-15 13:18:06 -0700
committerRonald G. Minnich <rminnich@gmail.com>2012-11-13 21:56:03 +0100
commita42e2f4daaa9537eeea41f68eae1ef16265f4010 (patch)
tree6d93f1026d22c32f0371d876dbb4eff8db1b6ffa /src/cpu/intel/microcode
parent0a405bafc5d56dd1646020929021d062244dd6e7 (diff)
Add spinlock to serialize Intel microcode updates
Updating microcode on several threads in a core at once can be harmful. Hence add a spinlock to make sure that does not happen. Change-Id: I0c9526b6194202ae7ab5c66361fe04ce137372cc Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/1778 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/cpu/intel/microcode')
-rw-r--r--src/cpu/intel/microcode/microcode.c13
1 files changed, 12 insertions, 1 deletions
diff --git a/src/cpu/intel/microcode/microcode.c b/src/cpu/intel/microcode/microcode.c
index a4471ca042..15d6513b33 100644
--- a/src/cpu/intel/microcode/microcode.c
+++ b/src/cpu/intel/microcode/microcode.c
@@ -28,12 +28,16 @@
#include <cpu/x86/msr.h>
#include <cpu/intel/microcode.h>
-#if CONFIG_CPU_MICROCODE_IN_CBFS
#ifdef __PRE_RAM__
+#if CONFIG_CPU_MICROCODE_IN_CBFS
#include <arch/cbfs.h>
+#endif
#else
+#if CONFIG_CPU_MICROCODE_IN_CBFS
#include <cbfs.h>
#endif
+#include <smp/spinlock.h>
+DECLARE_SPIN_LOCK(microcode_lock)
#endif
struct microcode {
@@ -112,6 +116,9 @@ void intel_update_microcode(const void *microcode_updates)
printk(BIOS_DEBUG, "microcode: sig=0x%x pf=0x%x revision=0x%x\n",
sig, pf, rev);
#endif
+#if !defined(__ROMCC__) && !defined(__PRE_RAM__)
+ spin_lock(&microcode_lock);
+#endif
m = microcode_updates;
for(c = microcode_updates; m->hdrver; m = (const struct microcode *)c) {
@@ -142,6 +149,10 @@ void intel_update_microcode(const void *microcode_updates)
c += 2048;
}
}
+
+#if !defined(__ROMCC__) && !defined(__PRE_RAM__)
+ spin_unlock(&microcode_lock);
+#endif
}
#if CONFIG_CPU_MICROCODE_IN_CBFS