diff options
| author | Hung-Te Lin <hungte@chromium.org> | 2013-06-22 11:18:39 +0800 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2013-07-10 23:15:50 +0200 |
| commit | e946f981a4c603d93eced2e0ccf8837fca7c8cd4 (patch) | |
| tree | 0f40ca757a90b725e41cbdc408d2fb2399a5a0c7 /src/cpu/intel/microcode | |
| parent | 23fb9979d999a155a2560a9f09f4fcdc1b96e9e7 (diff) | |
ec/google: Support Chrome EC protocol version 3.
Add the new Chrome EC protocol version 3 to Coreboot.
Note, protocol version 3 is not applied on any bus implementations yet.
LPC (x86) and I2C (arm/snow) are still using v2 protocol. The first one to use
v3 protocol will be SPI bus (arm/pit). LPC / I2C will be updated to v3 only
when they are ready to change.
Change-Id: I3006435295fb509c6351afbb97de0fcedcb1d8c4
Signed-off-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-on: http://review.coreboot.org/3750
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/cpu/intel/microcode')
0 files changed, 0 insertions, 0 deletions