aboutsummaryrefslogtreecommitdiff
path: root/src/cpu/intel/microcode
diff options
context:
space:
mode:
authorAlexandru Gagniuc <mr.nuke.me@gmail.com>2013-12-04 22:21:15 -0600
committerAlexandru Gagniuc <mr.nuke.me@gmail.com>2013-12-13 01:28:36 +0100
commit66e0c4c8c46eec6063a7bb8933990cc5c203ec2e (patch)
tree6e4e497d1e245f6e0bac3f2d100ce4f4e8aa0747 /src/cpu/intel/microcode
parent580d11f1f1448a618c339d60b83b52f3bd259b8d (diff)
cpu: Rename CPU_MICROCODE_IN_CBFS to SUPPORT_CPU_UCODE_IN_CBFS
CPU_MICROCODE_IN_CBFS was designed to mean that loading microcode updates from a CBFS file is supported, however, the name implies that microcode is present in CBFS. This has recently caused confusion both with contributions from Google, as well as SAGE. Rename this option to SUPPORT_CPU_UCODE_IN_CBFS in order to make it clearer that what is meant is "hey, the code we have for this CPU supports loading microcode updates from CBFS", and prevent further confusion. Change-Id: I394555f690b5ab4cac6fbd3ddbcb740ab1138339 Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-on: http://review.coreboot.org/4482 Reviewed-by: Marc Jones <marc.jones@se-eng.com> Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/cpu/intel/microcode')
-rw-r--r--src/cpu/intel/microcode/microcode.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/cpu/intel/microcode/microcode.c b/src/cpu/intel/microcode/microcode.c
index 1991ed8472..a68b24d180 100644
--- a/src/cpu/intel/microcode/microcode.c
+++ b/src/cpu/intel/microcode/microcode.c
@@ -30,11 +30,11 @@
#include <cpu/intel/microcode.h>
#ifdef __PRE_RAM__
-#if CONFIG_CPU_MICROCODE_IN_CBFS
+#if CONFIG_SUPPORT_CPU_UCODE_IN_CBFS
#include <arch/cbfs.h>
#endif
#else
-#if CONFIG_CPU_MICROCODE_IN_CBFS
+#if CONFIG_SUPPORT_CPU_UCODE_IN_CBFS
#include <cbfs.h>
#endif
#include <smp/spinlock.h>
@@ -82,7 +82,7 @@ static inline u32 read_microcode_rev(void)
return msr.hi;
}
-#if CONFIG_CPU_MICROCODE_IN_CBFS
+#if CONFIG_SUPPORT_CPU_UCODE_IN_CBFS
#define MICROCODE_CBFS_FILE "cpu_microcode_blob.bin"
@@ -192,7 +192,7 @@ void intel_update_microcode_from_cbfs(void)
#endif
}
-#else /* !CONFIG_CPU_MICROCODE_IN_CBFS */
+#else /* !CONFIG_SUPPORT_CPU_UCODE_IN_CBFS */
void intel_update_microcode(const void *microcode_updates)
{