summaryrefslogtreecommitdiff
path: root/src/cpu/intel/microcode/update-microcodes.sh
diff options
context:
space:
mode:
authorMartin Roth <martin.roth@se-eng.com>2014-06-12 12:31:59 -0600
committerMartin Roth <gaumless@gmail.com>2014-06-18 22:24:54 +0200
commitde38eeaaa6d27b25efc5c7c8ea2b09090f9241f0 (patch)
tree8a7a291a4a7b153b92186e74c467747dcd6f117f /src/cpu/intel/microcode/update-microcodes.sh
parentc0602d4cab34ee228465c2779dda400b367082b6 (diff)
fsp_baytrail: Add the default FSP location
The default FSP location needs to be in the chipset, not the mainboard. This was removed from the Bayley Bay mainboard in patch 41ea7230f7 reviewed at http://review.coreboot.org/#/c/5982/ Change-Id: Ia26ed34e1401cbd2303166628e7a4e357d79c874 Signed-off-by: Martin Roth <martin.roth@se-eng.com> Reviewed-on: http://review.coreboot.org/5985 Reviewed-by: Dave Frodin <dave.frodin@se-eng.com> Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/cpu/intel/microcode/update-microcodes.sh')
0 files changed, 0 insertions, 0 deletions