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author | Nico Huber <nico.h@gmx.de> | 2019-08-05 19:19:59 +0200 |
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committer | Nico Huber <nico.h@gmx.de> | 2019-08-09 09:32:28 +0000 |
commit | ef19ce5346ff33375b483f0f97c29bf86e913ae1 (patch) | |
tree | 21f7d42774fa4006128c3e41d1fe4454b76fbed6 /src/cpu/intel/haswell | |
parent | 84d5d65bcee25c90314d9206d5a383379d1fc56a (diff) |
soc/intel/common: Implement power-failure-state handling
This is a consolidation of the respective feature in `soc/intel/*lake/`,
including additional support for MAINBOARD_POWER_STATE_PREVIOUS.
For the latter, firmware has to keep track of the `previous` state. The
feature was already advertised in Kconfig long ago, but not implemented.
SoC code has to call pmc_set_power_failure_state() at least once during
boot and needs to implement pmc_soc_set_afterg3_en() for the actual
register write.
Change-Id: Ic6970a79d9b95373c2855f4c92232d2aa05963bb
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34724
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/cpu/intel/haswell')
0 files changed, 0 insertions, 0 deletions