diff options
| author | Angel Pons <th3fanbus@gmail.com> | 2020-10-28 22:41:26 +0100 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2021-01-11 23:42:03 +0000 |
| commit | 9dcd1c1173be1cfd5e73d9aca9d6de2353f1b5d9 (patch) | |
| tree | 3f659a8771570d954911773ff65b9f20ae9a7278 /src/cpu/intel/haswell | |
| parent | 053deb8e06bcdd258b8e66deaf2b039087e66507 (diff) | |
cpu/intel/haswell: Raise PSI1 threshold to 20A
Haswell reference code version 1.9.0 uses the same value as Broadwell.
Change-Id: I979ea1b4ba2962bd0c55cfb9d0c291f32cf5fcad
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46919
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/cpu/intel/haswell')
| -rw-r--r-- | src/cpu/intel/haswell/haswell_init.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/cpu/intel/haswell/haswell_init.c b/src/cpu/intel/haswell/haswell_init.c index 920a7e7bb3..369ace9b45 100644 --- a/src/cpu/intel/haswell/haswell_init.c +++ b/src/cpu/intel/haswell/haswell_init.c @@ -260,7 +260,7 @@ static void initialize_vr_config(void) msr.hi &= 0xc0000000; msr.hi |= (0x01 << (52 - 32)); /* PSI3 threshold - 1A. */ msr.hi |= (0x05 << (42 - 32)); /* PSI2 threshold - 5A. */ - msr.hi |= (0x0f << (32 - 32)); /* PSI1 threshold - 15A. */ + msr.hi |= (0x14 << (32 - 32)); /* PSI1 threshold - 20A. */ if (haswell_is_ult()) msr.hi |= (1 << (62 - 32)); /* Enable PSI4 */ |