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authorLee Leahy <leroy.p.leahy@intel.com>2017-03-15 17:52:06 -0700
committerLee Leahy <leroy.p.leahy@intel.com>2017-03-16 04:13:50 +0100
commit73a28942031675fce20d6649d2c2ce66fe62f416 (patch)
treed225fe29f105a2c745edb1c56f348f2c937eaeb2 /src/cpu/intel/haswell
parent4239ff37b7711bd81bc5ab96bb135b3c977aa2b5 (diff)
cpu/intel: Add int to unsigned
Fix the following warning detected by checkpatch.pl: WARNING: Prefer 'unsigned int' to bare use of 'unsigned' TEST=Build and run on Galileo Gen2 Change-Id: I207713a3370e5a9abed4535187aa2aaeef502d6f Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com> Reviewed-on: https://review.coreboot.org/18848 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/cpu/intel/haswell')
-rw-r--r--src/cpu/intel/haswell/bootblock.c4
-rw-r--r--src/cpu/intel/haswell/finalize.c2
-rw-r--r--src/cpu/intel/haswell/haswell_init.c4
3 files changed, 5 insertions, 5 deletions
diff --git a/src/cpu/intel/haswell/bootblock.c b/src/cpu/intel/haswell/bootblock.c
index 204a86bd55..0522f94c9a 100644
--- a/src/cpu/intel/haswell/bootblock.c
+++ b/src/cpu/intel/haswell/bootblock.c
@@ -31,8 +31,8 @@
#error "CPU must be paired with Intel LynxPoint southbridge"
#endif
-static void set_var_mtrr(
- unsigned reg, unsigned base, unsigned size, unsigned type)
+static void set_var_mtrr(unsigned int reg, unsigned int base, unsigned int size,
+ unsigned int type)
{
/* Bit Bit 32-35 of MTRRphysMask should be set to 1 */
diff --git a/src/cpu/intel/haswell/finalize.c b/src/cpu/intel/haswell/finalize.c
index 743b9002cc..ba2538702e 100644
--- a/src/cpu/intel/haswell/finalize.c
+++ b/src/cpu/intel/haswell/finalize.c
@@ -26,7 +26,7 @@
* Revision 1.6.0, June 2012 */
#if 0
-static void msr_set_bit(unsigned reg, unsigned bit)
+static void msr_set_bit(unsigned int reg, unsigned int bit)
{
msr_t msr = rdmsr(reg);
diff --git a/src/cpu/intel/haswell/haswell_init.c b/src/cpu/intel/haswell/haswell_init.c
index ba6d83b785..89869e4418 100644
--- a/src/cpu/intel/haswell/haswell_init.c
+++ b/src/cpu/intel/haswell/haswell_init.c
@@ -414,8 +414,8 @@ void set_power_limits(u8 power_limit_1_time)
{
msr_t msr = rdmsr(MSR_PLATFORM_INFO);
msr_t limit;
- unsigned power_unit;
- unsigned tdp, min_power, max_power, max_time;
+ unsigned int power_unit;
+ unsigned int tdp, min_power, max_power, max_time;
u8 power_limit_1_val;
if (power_limit_1_time >= ARRAY_SIZE(power_limit_time_sec_to_msr))