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authorArthur Heymans <arthur@aheymans.xyz>2019-11-11 20:18:24 +0100
committerPatrick Georgi <pgeorgi@google.com>2019-11-14 11:30:34 +0000
commit2452afbe04584d48a9d76535f943c0cfc641aa19 (patch)
tree0ce5aed52511660ab274d8a0aeb95cb606a7b57a /src/cpu/intel/haswell
parentaa990e928910e35edb115095898c4668becdf1d8 (diff)
mb/*/*(ich7/x4x): Use common early southbridge init
One functional change is that southbridge GPIO init is moved after console init. Change-Id: I53e6f177aadcdaa8c45593e0a8098e8d3c400d27 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36757 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/cpu/intel/haswell')
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