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authorAngel Pons <th3fanbus@gmail.com>2020-09-24 18:03:18 +0200
committerNico Huber <nico.h@gmx.de>2020-10-14 08:37:36 +0000
commit2aaf7c0a1d1a895805772fe5f878606161c8d3c5 (patch)
tree5d590e1379ec8098b6a8040a5357075d309f86c9 /src/cpu/intel/haswell/smmrelocate.c
parent2ead36334050ac692e64adc59a97320d8792adcc (diff)
haswell/lynxpoint: Align cosmetics with Broadwell
Tested with BUILD_TIMELESS=1, Google Wolf does not change. Change-Id: Ibd8430352e860ffc0e2030fd7bc73582982f4695 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45698 Reviewed-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/cpu/intel/haswell/smmrelocate.c')
-rw-r--r--src/cpu/intel/haswell/smmrelocate.c6
1 files changed, 2 insertions, 4 deletions
diff --git a/src/cpu/intel/haswell/smmrelocate.c b/src/cpu/intel/haswell/smmrelocate.c
index abc005c6f0..2fc20aab3d 100644
--- a/src/cpu/intel/haswell/smmrelocate.c
+++ b/src/cpu/intel/haswell/smmrelocate.c
@@ -156,7 +156,6 @@ static void fill_in_relocation_params(struct smm_relocation_params *params)
{
uintptr_t tseg_base;
size_t tseg_size;
-
u32 prmrr_base;
u32 prmrr_size;
int phys_bits;
@@ -197,7 +196,7 @@ static void fill_in_relocation_params(struct smm_relocation_params *params)
params->uncore_prmrr_base.lo = prmrr_base;
params->uncore_prmrr_base.hi = 0;
params->uncore_prmrr_mask.lo = (~(prmrr_size - 1) & rmask) |
- MTRR_PHYS_MASK_VALID;
+ MTRR_PHYS_MASK_VALID;
params->uncore_prmrr_mask.hi = (1 << (39 - 32)) - 1;
}
@@ -282,6 +281,5 @@ void smm_lock(void)
* make the SMM registers writable again.
*/
printk(BIOS_DEBUG, "Locking SMM.\n");
- pci_write_config8(pcidev_on_root(0, 0), SMRAM,
- D_LCK | G_SMRAME | C_BASE_SEG);
+ pci_write_config8(pcidev_on_root(0, 0), SMRAM, D_LCK | G_SMRAME | C_BASE_SEG);
}