diff options
| author | Angel Pons <th3fanbus@gmail.com> | 2020-10-28 19:29:49 +0100 |
|---|---|---|
| committer | Angel Pons <th3fanbus@gmail.com> | 2021-01-10 15:42:17 +0000 |
| commit | 829fb2e9857fa9764edc2aadc292168a07939602 (patch) | |
| tree | 1b003874cf139edc6d6ca63c81ceb7f7774fa355 /src/cpu/intel/haswell/haswell_init.c | |
| parent | 78c45bd3ef775a790f5cfe60462d37d5edb19e4f (diff) | |
cpu/intel/haswell: Do not determine CPU type at runtime
It is already known at compile-time.
Change-Id: I20303cd1f79b71268a9d734c85a1291afe9177e9
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46912
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/cpu/intel/haswell/haswell_init.c')
| -rw-r--r-- | src/cpu/intel/haswell/haswell_init.c | 21 |
1 files changed, 0 insertions, 21 deletions
diff --git a/src/cpu/intel/haswell/haswell_init.c b/src/cpu/intel/haswell/haswell_init.c index 4b73c6a28c..15dcff54dd 100644 --- a/src/cpu/intel/haswell/haswell_init.c +++ b/src/cpu/intel/haswell/haswell_init.c @@ -186,27 +186,6 @@ static const u8 power_limit_time_msr_to_sec[] = { [0x11] = 128, }; -int haswell_family_model(void) -{ - return cpuid_eax(1) & 0x0fff0ff0; -} - -int haswell_stepping(void) -{ - return cpuid_eax(1) & 0xf; -} - -/* Dynamically determine if the part is ULT. */ -int haswell_is_ult(void) -{ - static int ult = -1; - - if (ult < 0) - ult = !!(haswell_family_model() == HASWELL_FAMILY_ULT); - - return ult; -} - /* The core 100MHz BCLK is disabled in deeper c-states. One needs to calibrate * the 100MHz BCLK against the 24MHz BCLK to restore the clocks properly * when a core is woken up. */ |