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author | Tim Chen <Tim-Chen@quantatw.com> | 2017-03-14 14:43:31 +0800 |
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committer | Aaron Durbin <adurbin@chromium.org> | 2017-03-16 04:13:39 +0100 |
commit | 4239ff37b7711bd81bc5ab96bb135b3c977aa2b5 (patch) | |
tree | e48abcd6871421e0fc02c8afae8210ac9909a63b /src/cpu/intel/haswell/bootblock.c | |
parent | 9d62e7e75e43d6737df9d0ab5603446d7f5e408d (diff) |
mainboard/google/reef: Increase PL2 Max to 15W
Update the DPTF parameters based on thermal test result.
(ZHT_DPTF_DVT_v0.6_20170314.xlsx)
1. Increase PL2 Max to 15W.
BUG=b:35583586
BRANCH=reef
TEST=build and verify PL2 Max value on electro dut
Change-Id: I13167e28267d5827d79a6bde31f077a01f2bd535
Signed-off-by: Tim Chen <Tim-Chen@quantatw.com>
Reviewed-on: https://review.coreboot.org/18807
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/cpu/intel/haswell/bootblock.c')
0 files changed, 0 insertions, 0 deletions