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authorAlexandru Gagniuc <mr.nuke.me@gmail.com>2015-10-03 13:49:23 -0700
committerAlexandru Gagniuc <mr.nuke.me@gmail.com>2015-10-03 22:23:54 +0000
commit959478a763c16688d43752adbae2c76e7764da45 (patch)
tree2341da5033876b7358df78c9d570015794e9296f /src/cpu/intel/fsp_model_406dx/Kconfig
parentfb50124d22014742b6990a95df87a7a828e891b6 (diff)
Remove FSP Rangeley SOC and mohonpeak board support
mohonpeak is the reference board for Rangeley. I doubt anyone uses it or cares about it. We jokingly refer to it as "Moron Peak". It's code with no known users, so we shouldn't be hauling it around for the eventuality that someone might use it in the future. Change-Id: Id3c9fc39e1b98707d96a95f2a914de6bbb31c615 Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-on: http://review.coreboot.org/11790 Tested-by: build bot (Jenkins) Reviewed-by: Philipp Deppenwiese <zaolin@das-labor.org>
Diffstat (limited to 'src/cpu/intel/fsp_model_406dx/Kconfig')
-rw-r--r--src/cpu/intel/fsp_model_406dx/Kconfig65
1 files changed, 0 insertions, 65 deletions
diff --git a/src/cpu/intel/fsp_model_406dx/Kconfig b/src/cpu/intel/fsp_model_406dx/Kconfig
deleted file mode 100644
index 163040970f..0000000000
--- a/src/cpu/intel/fsp_model_406dx/Kconfig
+++ /dev/null
@@ -1,65 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2013-2014 Sage Electronic Engineering, LLC.
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; version 2 of the License.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-## GNU General Public License for more details.
-##
-## You should have received a copy of the GNU General Public License
-## along with this program; if not, write to the Free Software
-## Foundation, Inc.
-##
-
-config CPU_INTEL_FSP_MODEL_406DX
- bool
-
-if CPU_INTEL_FSP_MODEL_406DX
-
-config CPU_SPECIFIC_OPTIONS
- def_bool y
- select PLATFORM_USES_FSP1_0
- select ARCH_BOOTBLOCK_X86_32
- select ARCH_VERSTAGE_X86_32
- select ARCH_ROMSTAGE_X86_32
- select ARCH_RAMSTAGE_X86_32
- select SMP
- select SSE2
- select UDELAY_LAPIC
- select SUPPORT_CPU_UCODE_IN_CBFS if HAVE_FSP_BIN
- select PARALLEL_CPU_INIT
- select TSC_SYNC_MFENCE
- select LAPIC_MONOTONIC_TIMER
-
-choice
- prompt "Rangeley CPU Stepping"
- default FSP_MODEL_406DX_B0
-
-config FSP_MODEL_406DX_A1
- bool "A1"
-
-config FSP_MODEL_406DX_B0
- bool "B0"
-
-endchoice
-
-config BOOTBLOCK_CPU_INIT
- string
- default "cpu/intel/fsp_model_406dx/bootblock.c"
-
-config ENABLE_VMX
- bool "Enable VMX for virtualization"
- default n
-
-config CPU_MICROCODE_CBFS_LOC
- hex
- depends on SUPPORT_CPU_UCODE_IN_CBFS
- default 0xfff60040
-
-endif #CPU_INTEL_FSP_MODEL_406DX