soc/intel/skl,cpu/intel: copy AES-NI locking to common cpu code

Copy the AES-NI locking function to common cpu code to be able to reuse
it.

This change only copies the code and adds the MSR header file. Any
further rework and later deduplication on the platforms code is done in
the follow-up changes.

Change-Id: I81ad5c0d4797b139435c57d3af0a95db94a5c15e
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46272
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>

1 files changed, 20 insertions, 0 deletions

diff --git a/src/cpu/intel/common/common_init.c b/src/cpu/intel/common/common_init.c
index 3e5b578d22..e532c975cb 100644
--- a/src/cpu/intel/common/common_init.c
+++ b/src/cpu/intel/common/common_init.c
@@ -3,6 +3,7 @@
 #include <acpi/acpigen.h>
 #include <arch/cpu.h>
 #include <console/console.h>
+#include <cpu/intel/msr.h>
 #include <cpu/x86/msr.h>
 #include "common.h"
 
@@ -264,3 +265,22 @@ void cpu_init_cppc_config(struct cppc_config *config, u32 version)
 		config->regs[CPPC_AUTO_SELECT] = msr;
 	}
 }
+
+/*
+ * Lock AES-NI feature (MSR_FEATURE_CONFIG) to prevent unintended disabling
+ * as suggested in Intel document 325384-070US.
+ */
+void set_aesni_lock(void)
+{
+	msr_t msr;
+
+	/* Only run once per core as specified in the MSR datasheet */
+	if (intel_ht_sibling())
+		return;
+
+	msr = rdmsr(MSR_FEATURE_CONFIG);
+	if ((msr.lo & 1) == 0) {
+		msr.lo |= 1;
+		wrmsr(MSR_FEATURE_CONFIG, msr);
+	}
+}