diff options
| author | Elyes HAOUAS <ehaouas@noos.fr> | 2017-06-27 22:54:42 +0200 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2017-06-28 00:23:32 +0000 |
| commit | 168ef399c43ad79a40a8bbb2de921a2bd906b3f5 (patch) | |
| tree | 16613245bebd7920cf3e7ce41f0d7bb5441f05e2 /src/cpu/intel/car | |
| parent | 70083a1de9e12d8dbd3ba70e7a36a7282090f0e0 (diff) | |
cpu/*: Add whitespace around '<<'
Change-Id: Id46c0b57bd7c9b954b29537c70254df947690e0b
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/20397
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/cpu/intel/car')
| -rw-r--r-- | src/cpu/intel/car/cache_as_ram_ht.inc | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/cpu/intel/car/cache_as_ram_ht.inc b/src/cpu/intel/car/cache_as_ram_ht.inc index db779fae7e..e716caf186 100644 --- a/src/cpu/intel/car/cache_as_ram_ht.inc +++ b/src/cpu/intel/car/cache_as_ram_ht.inc @@ -82,7 +82,7 @@ clear_mtrrs: addrsize_no_MSR: movl $1, %eax cpuid - andl $(1<<6 | 1<<17), %edx /* PAE or PSE36 */ + andl $(1 << 6 | 1 << 17), %edx /* PAE or PSE36 */ jz addrsize_set_high movl $0x0f, %edx @@ -208,7 +208,7 @@ ap_init: /* MTRR registers are shared between HT siblings. */ movl $(MTRR_PHYS_BASE(0)), %ecx - movl $(1<<12), %eax + movl $(1 << 12), %eax xorl %edx, %edx wrmsr |