diff options
| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2016-06-17 10:43:48 +0300 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-06-21 00:43:20 +0200 |
| commit | 408d3928236f275633f8656cc12e32949d304d9f (patch) | |
| tree | a02149efa1a0b57c0ed8b5afe4bb76f98d35bff2 /src/cpu/intel/car | |
| parent | 07921540dda79d810d8bfc6be211513c238a0d63 (diff) | |
intel/car/cache_as_ram_ht.inc: Prepare for dynamic CONFIG_RAMTOP
Change-Id: Idb0f621553e76e771a5d6f2d492675ccd989d947
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/15228
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/cpu/intel/car')
| -rw-r--r-- | src/cpu/intel/car/cache_as_ram_ht.inc | 11 |
1 files changed, 8 insertions, 3 deletions
diff --git a/src/cpu/intel/car/cache_as_ram_ht.inc b/src/cpu/intel/car/cache_as_ram_ht.inc index ee4a1bb332..f5256adb76 100644 --- a/src/cpu/intel/car/cache_as_ram_ht.inc +++ b/src/cpu/intel/car/cache_as_ram_ht.inc @@ -339,8 +339,12 @@ no_msr_11e: post_code(0x2f) /* Call romstage.c main function. */ - call main - addl $4, %esp + call romstage_main + + /* Save return value from romstage_main. It contains the stack to use + * after cache-as-ram is torn down. It also contains the information + * for setting up MTRRs. */ + movl %eax, %ebx post_code(0x30) @@ -425,7 +429,8 @@ __main: post_code(POST_PREPARE_RAMSTAGE) cld /* Clear direction flag. */ - movl $CONFIG_RAMTOP, %esp + /* Setup stack as indicated by return value from romstage_main(). */ + movl %ebx, %esp movl %esp, %ebp call copy_and_run |