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authorArthur Heymans <arthur@aheymans.xyz>2021-07-05 21:18:50 +0200
committerFelix Held <felix-coreboot@felixheld.de>2024-02-08 13:11:59 +0000
commit3edf840ad15154d38769c0115811906284762b11 (patch)
tree02b55264c698b3c0fb1422f41ceecf6424a0ae20 /src/cpu/intel/car/non-evict
parentcdea508a024376c79c8cf29648ba174867eb2750 (diff)
cpu/x86/64bit: Turn jumping to long mode into a macro
This makes it easier to reuse, e.g. if you want to do it twice in one assembly file. Change-Id: Ida861338004187e4e714be41e17c8447fa4cf935 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/79261 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/cpu/intel/car/non-evict')
-rw-r--r--src/cpu/intel/car/non-evict/cache_as_ram.S4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/cpu/intel/car/non-evict/cache_as_ram.S b/src/cpu/intel/car/non-evict/cache_as_ram.S
index 76986ff68e..578bf03afd 100644
--- a/src/cpu/intel/car/non-evict/cache_as_ram.S
+++ b/src/cpu/intel/car/non-evict/cache_as_ram.S
@@ -4,6 +4,7 @@
#include <cpu/x86/mtrr.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/post_code.h>
+#include <cpu/x86/64bit/entry64.inc>
#define NoEvictMod_MSR 0x2e0
#define BBL_CR_CTL3_MSR 0x11e
@@ -213,8 +214,7 @@ end_microcode_update:
andl $0xfffffff0, %esp
#if ENV_X86_64
-
- #include <cpu/x86/64bit/entry64.inc>
+ setup_longmode $(CONFIG_ARCH_X86_64_PGTBL_LOC)
movd %mm2, %rdi
shlq $32, %rdi