diff options
author | Elyes HAOUAS <ehaouas@noos.fr> | 2018-09-30 07:44:39 +0200 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2018-10-04 09:38:04 +0000 |
commit | 02820ca1862fdf7078aa0749d3f2ef5c80b0daba (patch) | |
tree | 4bf69038ca2831385ab763bb031491283a7e571e /src/cpu/intel/car/core2 | |
parent | 0562c1e75820b05c4a278538496e8a3ffc660866 (diff) |
cpu/intel/car: Fix typo
Change-Id: If71ab647f012a735c6aa6939463414407757ab9a
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/28805
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/cpu/intel/car/core2')
-rw-r--r-- | src/cpu/intel/car/core2/cache_as_ram.S | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/cpu/intel/car/core2/cache_as_ram.S b/src/cpu/intel/car/core2/cache_as_ram.S index f47e81240c..9a433d6e3c 100644 --- a/src/cpu/intel/car/core2/cache_as_ram.S +++ b/src/cpu/intel/car/core2/cache_as_ram.S @@ -55,7 +55,7 @@ clear_fixed_mtrr: wrmsr jnz clear_fixed_mtrr - /* Figure put how many MTRRs we have, and clear them out */ + /* Figure out how many MTRRs we have, and clear them out */ mov $MTRR_CAP_MSR, %ecx rdmsr movzb %al, %ebx /* Number of variable MTRRs */ |