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author | Felix Held <felix-coreboot@felixheld.de> | 2022-01-19 22:26:31 +0100 |
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committer | Felix Held <felix-coreboot@felixheld.de> | 2022-01-20 22:28:50 +0000 |
commit | 21bc2ca5d5b7f873eb1d6a428b2e7b32dea21a78 (patch) | |
tree | 638de91ec39f64a03ecc5b727aa5d0fdb67bd7db /src/cpu/intel/Kconfig | |
parent | cf4bba82cbb62237609b03ba2933c81558df4785 (diff) |
soc/amd/cezanne,picasso: factor out common early non-car cache setup
This implementation is the same for all SoC that select
SOC_AMD_COMMON_BLOCK_NONCAR, so factor it out to the common AMD non-CAR
CPU support code folder.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I53528f0bb75e9d945740ad5065c75e7de7b5878f
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61257
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/cpu/intel/Kconfig')
0 files changed, 0 insertions, 0 deletions