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authorAaron Durbin <adurbin@chromium.org>2013-11-12 20:21:53 -0600
committerKyösti Mälkki <kyosti.malkki@gmail.com>2014-05-07 12:05:10 +0200
commitdc866cff31e26de7cf95bbd0675037d8066f7dc8 (patch)
tree7892841d2f4ecd31754ccfb6284ec3b7a92703ab /src/cpu/dmp
parent64b902b57a035c31043cb0c6690e221a25287ff3 (diff)
baytrail: first pass at lpss device initialization
This commit does the common parts for all LPSS devices that are enabled: enable snoop in IOSF and enable power management. Additionally, the i2c devices are taken out of reset. BUG=chrome-os-partner:23790 BRANCH=None TEST=Built and booted with modified kernel-next. I2C bus devices show up and I see 0x10 on one of the buses. Change-Id: I540caea6a8666f5684dc5cee683a6b085dfac6de Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/176424 Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: http://review.coreboot.org/4969 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
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