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author | Jeremy Compostella <jeremy.compostella@intel.com> | 2023-01-30 17:23:46 -0700 |
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committer | Nick Vaccaro <nvaccaro@google.com> | 2023-02-03 19:01:21 +0000 |
commit | cfd6f9c7f1238c71b78273798c62d2f51cb5a555 (patch) | |
tree | 9d4d3206c6cf6c7224dd3ed38b2bac18f0d6db13 /src/cpu/armltd | |
parent | 8c127ecc3c28a3188490af8daef43d528560ebd2 (diff) |
soc/intel/alderlake: Add a few missing definitions in iomap.h
Some reserved address range listed in Alder Lake Platform Firmware
Architecture Specification document 626540 section 6.4 ADL - System
Memory Map such as North TraceHub ranges were missing. Details about
North TraceHub (aka. Intel TraceHub) can be found in Intel Trace
Hub (Intel TH) Developer's Manual document 671536.
BUG=b:264648959
TEST=Compilation successful
Change-Id: I14803a7297c8c5edefe564d92bfe7314f6769942
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/72635
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: YH Lin <yueherngl@google.com>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Diffstat (limited to 'src/cpu/armltd')
0 files changed, 0 insertions, 0 deletions