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authorJeff Daly <jeffd@silicom-usa.com>2022-01-10 23:47:35 -0500
committerFelix Held <felix-coreboot@felixheld.de>2022-06-17 14:52:41 +0000
commite5ac30060298626cf12972209ea81a77d0569cde (patch)
treeeb34efb014f6f3afe6cefbcd831c060c5ce4a82f /src/cpu/armltd/Kconfig
parent24f7554e070ce11d902b7b78846158f802c4b952 (diff)
soc/intel/denverton_ns: enable Denverton to use common SoC SPI code
Use Intel common SoC SPI code for Denverton refactor Signed-off-by: Jeff Daly <jeffd@silicom-usa.com> Change-Id: Ic1d57c6b348adb934785b0e2bec4e856f0bf8d77 Reviewed-on: https://review.coreboot.org/c/coreboot/+/61014 Reviewed-by: Mariusz SzafraƄski <mariuszx.szafranski@intel.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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