diff options
| author | Marshall Dawson <marshalldawson3rd@gmail.com> | 2018-08-07 07:17:41 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2018-08-08 17:50:02 +0000 |
| commit | bddd157ea1508e5d13dd592533bc7607241388fa (patch) | |
| tree | 9b83984be3dc8e8bfbbb1f4b62bbef2e5ffafbc8 /src/cpu/amd | |
| parent | b388c0e5577eb360ee1df1da7f802b056cec08a9 (diff) | |
cpu/amd: Rename MCA status register
Change the defined name of MCI_STATUS (i.e. MCi_STATUS) to reflect its
MC0_STATUS address.
Change-Id: I97d2631a186965bb8b18f544ed9648b3a71f5fb0
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/27922
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/cpu/amd')
| -rw-r--r-- | src/cpu/amd/agesa/family12/model_12_init.c | 4 | ||||
| -rw-r--r-- | src/cpu/amd/agesa/family14/model_14_init.c | 4 | ||||
| -rw-r--r-- | src/cpu/amd/agesa/family15tn/model_15_init.c | 2 | ||||
| -rw-r--r-- | src/cpu/amd/agesa/family16kb/model_16_init.c | 2 | ||||
| -rw-r--r-- | src/cpu/amd/family_10h-family_15h/model_10xxx_init.c | 4 | ||||
| -rw-r--r-- | src/cpu/amd/pi/00630F01/model_15_init.c | 2 | ||||
| -rw-r--r-- | src/cpu/amd/pi/00660F01/model_15_init.c | 2 | ||||
| -rw-r--r-- | src/cpu/amd/pi/00730F01/model_16_init.c | 2 |
8 files changed, 11 insertions, 11 deletions
diff --git a/src/cpu/amd/agesa/family12/model_12_init.c b/src/cpu/amd/agesa/family12/model_12_init.c index b4757c8baf..afdfb3b006 100644 --- a/src/cpu/amd/agesa/family12/model_12_init.c +++ b/src/cpu/amd/agesa/family12/model_12_init.c @@ -27,7 +27,7 @@ #include <cpu/amd/multicore.h> #include <cpu/amd/amdfam12.h> -#define MCI_STATUS 0x401 +#define MC0_STATUS 0x401 static void model_12_init(struct device *dev) { @@ -55,7 +55,7 @@ static void model_12_init(struct device *dev) msr.lo = 0; msr.hi = 0; for (i = 0; i < 5; i++) { - wrmsr(MCI_STATUS + (i * 4), msr); + wrmsr(MC0_STATUS + (i * 4), msr); } enable_cache(); diff --git a/src/cpu/amd/agesa/family14/model_14_init.c b/src/cpu/amd/agesa/family14/model_14_init.c index 1271a4eb51..257f81fd7a 100644 --- a/src/cpu/amd/agesa/family14/model_14_init.c +++ b/src/cpu/amd/agesa/family14/model_14_init.c @@ -28,7 +28,7 @@ #include <arch/acpi.h> #include <northbridge/amd/agesa/agesa_helper.h> -#define MCI_STATUS 0x401 +#define MC0_STATUS 0x401 static void model_14_init(struct device *dev) { @@ -78,7 +78,7 @@ static void model_14_init(struct device *dev) msr.lo = 0; msr.hi = 0; for (i = 0; i < 6; i++) { - wrmsr(MCI_STATUS + (i * 4), msr); + wrmsr(MC0_STATUS + (i * 4), msr); } /* Enable the local CPU APICs */ diff --git a/src/cpu/amd/agesa/family15tn/model_15_init.c b/src/cpu/amd/agesa/family15tn/model_15_init.c index 32dcd7b029..1e0375f23c 100644 --- a/src/cpu/amd/agesa/family15tn/model_15_init.c +++ b/src/cpu/amd/agesa/family15tn/model_15_init.c @@ -75,7 +75,7 @@ static void model_15_init(struct device *dev) msr.lo = 0; msr.hi = 0; for (i = 0; i < 6; i++) { - wrmsr(MCI_STATUS + (i * 4), msr); + wrmsr(MC0_STATUS + (i * 4), msr); } /* Enable the local CPU APICs */ diff --git a/src/cpu/amd/agesa/family16kb/model_16_init.c b/src/cpu/amd/agesa/family16kb/model_16_init.c index 73d91e7edf..9909793874 100644 --- a/src/cpu/amd/agesa/family16kb/model_16_init.c +++ b/src/cpu/amd/agesa/family16kb/model_16_init.c @@ -73,7 +73,7 @@ static void model_16_init(struct device *dev) msr.lo = 0; msr.hi = 0; for (i = 0; i < 6; i++) { - wrmsr(MCI_STATUS + (i * 4), msr); + wrmsr(MC0_STATUS + (i * 4), msr); } /* Enable the local CPU APICs */ diff --git a/src/cpu/amd/family_10h-family_15h/model_10xxx_init.c b/src/cpu/amd/family_10h-family_15h/model_10xxx_init.c index 562a267757..61eb81393a 100644 --- a/src/cpu/amd/family_10h-family_15h/model_10xxx_init.c +++ b/src/cpu/amd/family_10h-family_15h/model_10xxx_init.c @@ -32,7 +32,7 @@ #include <cpu/amd/multicore.h> #include <cpu/amd/msr.h> -#define MCI_STATUS 0x401 +#define MC0_STATUS 0x401 static inline uint8_t is_gt_rev_d(void) { @@ -112,7 +112,7 @@ static void model_10xxx_init(struct device *dev) msr.lo = 0; msr.hi = 0; for (i = 0; i < 5; i++) { - wrmsr(MCI_STATUS + (i * 4), msr); + wrmsr(MC0_STATUS + (i * 4), msr); } enable_cache(); diff --git a/src/cpu/amd/pi/00630F01/model_15_init.c b/src/cpu/amd/pi/00630F01/model_15_init.c index 212d705966..592ca4f086 100644 --- a/src/cpu/amd/pi/00630F01/model_15_init.c +++ b/src/cpu/amd/pi/00630F01/model_15_init.c @@ -72,7 +72,7 @@ static void model_15_init(struct device *dev) msr.lo = 0; msr.hi = 0; for (i = 0; i < 6; i++) - wrmsr(MCI_STATUS + (i * 4), msr); + wrmsr(MC0_STATUS + (i * 4), msr); /* Enable the local CPU APICs */ setup_lapic(); diff --git a/src/cpu/amd/pi/00660F01/model_15_init.c b/src/cpu/amd/pi/00660F01/model_15_init.c index 941c48f04c..24c2aea3d1 100644 --- a/src/cpu/amd/pi/00660F01/model_15_init.c +++ b/src/cpu/amd/pi/00660F01/model_15_init.c @@ -84,7 +84,7 @@ static void model_15_init(struct device *dev) msr.lo = 0; msr.hi = 0; for (i = 0; i < 6; i++) - wrmsr(MCI_STATUS + (i * 4), msr); + wrmsr(MC0_STATUS + (i * 4), msr); /* Enable the local CPU APICs */ diff --git a/src/cpu/amd/pi/00730F01/model_16_init.c b/src/cpu/amd/pi/00730F01/model_16_init.c index 747cb2ed1f..b9e01852b8 100644 --- a/src/cpu/amd/pi/00730F01/model_16_init.c +++ b/src/cpu/amd/pi/00730F01/model_16_init.c @@ -69,7 +69,7 @@ static void model_16_init(struct device *dev) msr.lo = 0; msr.hi = 0; for (i = 0; i < 6; i++) - wrmsr(MCI_STATUS + (i * 4), msr); + wrmsr(MC0_STATUS + (i * 4), msr); /* Enable the local CPU APICs */ |