diff options
author | Elyes HAOUAS <ehaouas@noos.fr> | 2019-03-03 12:49:56 +0100 |
---|---|---|
committer | Nico Huber <nico.h@gmx.de> | 2019-03-04 13:16:29 +0000 |
commit | 8ee161daab28a8c9bcd19418d968bb95fc47a190 (patch) | |
tree | e49f75a3f221d2962fc7ed42badd098b8904debb /src/cpu/amd | |
parent | 44206e38bf6e3ddd6a628ceab0c2c982ca6660b3 (diff) |
arch/x86/acpi: Remove obsolete acpi_gen_regaddr resv field
Since ACPI v2.c, this field is access_size.
Currently, coreboot is using ACPI v3,so we can drop '.resv' field.
Change-Id: I7b3b930861669bb05cdc8e81f6502476a0568fe0
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/31701
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/cpu/amd')
-rw-r--r-- | src/cpu/amd/family_10h-family_15h/powernow_acpi.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/cpu/amd/family_10h-family_15h/powernow_acpi.c b/src/cpu/amd/family_10h-family_15h/powernow_acpi.c index 2ce472215f..15b655028c 100644 --- a/src/cpu/amd/family_10h-family_15h/powernow_acpi.c +++ b/src/cpu/amd/family_10h-family_15h/powernow_acpi.c @@ -114,7 +114,7 @@ static void write_cstates_for_core(int coreID) cstate.resource.bit_offset = 0; cstate.resource.addrl = rdmsr(MSR_CSTATE_ADDRESS).lo + 1; cstate.resource.addrh = 0; - cstate.resource.resv = 1; + cstate.resource.access_size = 1; } else { cstate.ctype = 2; cstate.latency = 75; @@ -124,7 +124,7 @@ static void write_cstates_for_core(int coreID) cstate.resource.bit_offset = 0; cstate.resource.addrl = rdmsr(MSR_CSTATE_ADDRESS).lo; cstate.resource.addrh = 0; - cstate.resource.resv = 1; + cstate.resource.access_size = 1; } acpigen_write_CST_package(&cstate, cstate_count); |