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authorUwe Hermann <uwe@hermann-uwe.de>2010-09-23 18:48:27 +0000
committerUwe Hermann <uwe@hermann-uwe.de>2010-09-23 18:48:27 +0000
commit16db6c3486fba7292bade3233df96b4ab2ecc889 (patch)
treee862728c6b0e9e6eb7e11fd8d1d813981d23df6b /src/cpu/amd
parentd6b4f1cd0ad43d29fe925a6cc6951f205a8ead50 (diff)
Whitespace/typo/cosmetic fixes (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5830 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/cpu/amd')
-rw-r--r--src/cpu/amd/model_gx2/cache_as_ram.inc4
-rw-r--r--src/cpu/amd/model_lx/cache_as_ram.inc4
2 files changed, 4 insertions, 4 deletions
diff --git a/src/cpu/amd/model_gx2/cache_as_ram.inc b/src/cpu/amd/model_gx2/cache_as_ram.inc
index 09a7541676..433576c737 100644
--- a/src/cpu/amd/model_gx2/cache_as_ram.inc
+++ b/src/cpu/amd/model_gx2/cache_as_ram.inc
@@ -184,7 +184,7 @@ done_cache_as_ram_main:
/* clear boot_complete flag */
xorl %ebp, %ebp
__main:
- post_code(0x11) /* post 11 */
+ post_code(0x11)
/* TODO For suspend/resume the cache will have to live between
* CONFIG_RAMBASE and CONFIG_RAMTOP
@@ -201,7 +201,7 @@ __main:
call copy_and_run
.Lhlt:
- post_code(0xee) /* post fail ee */
+ post_code(0xee)
hlt
jmp .Lhlt
diff --git a/src/cpu/amd/model_lx/cache_as_ram.inc b/src/cpu/amd/model_lx/cache_as_ram.inc
index b592bc51b9..a2e8f87e64 100644
--- a/src/cpu/amd/model_lx/cache_as_ram.inc
+++ b/src/cpu/amd/model_lx/cache_as_ram.inc
@@ -210,7 +210,7 @@ done_cache_as_ram_main:
/* clear boot_complete flag */
xorl %ebp, %ebp
__main:
- post_code(0x11) /* post 11 */
+ post_code(0x11)
/* TODO For suspend/resume the cache will have to live between
* CONFIG_RAMBASE and CONFIG_RAMTOP
@@ -227,7 +227,7 @@ __main:
call copy_and_run
.Lhlt:
- post_code(0xee) /* post fail ee */
+ post_code(0xee)
hlt
jmp .Lhlt