diff options
| author | Elyes HAOUAS <ehaouas@noos.fr> | 2018-10-17 10:56:26 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-10-23 15:52:09 +0000 |
| commit | a342f3937e7ce159fd170ab8cd26ba799a3bc9e4 (patch) | |
| tree | 4bd4540ba11286f465272c1fbee62dbf5f9789f8 /src/cpu/amd | |
| parent | 9856892297ad997f586a1b4dd0a494f3764a0ce2 (diff) | |
src: Remove unneeded whitespace
Change-Id: I6c77f4289b46646872731ef9c20dc115f0cf876d
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/29161
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/cpu/amd')
| -rw-r--r-- | src/cpu/amd/family_10h-family_15h/fidvid.c | 2 | ||||
| -rw-r--r-- | src/cpu/amd/family_10h-family_15h/powernow_acpi.c | 2 | ||||
| -rw-r--r-- | src/cpu/amd/microcode/microcode.c | 2 |
3 files changed, 3 insertions, 3 deletions
diff --git a/src/cpu/amd/family_10h-family_15h/fidvid.c b/src/cpu/amd/family_10h-family_15h/fidvid.c index 91b9ad7560..428924df34 100644 --- a/src/cpu/amd/family_10h-family_15h/fidvid.c +++ b/src/cpu/amd/family_10h-family_15h/fidvid.c @@ -682,7 +682,7 @@ static void waitCurrentPstate(u32 target_pstate) { do { // should we just go on instead ? pstate_msr = rdmsr(PS_STS_REG); - } while ( pstate_msr.lo != target_pstate ); + } while (pstate_msr.lo != target_pstate); } } diff --git a/src/cpu/amd/family_10h-family_15h/powernow_acpi.c b/src/cpu/amd/family_10h-family_15h/powernow_acpi.c index 61da88cc49..d228858a8e 100644 --- a/src/cpu/amd/family_10h-family_15h/powernow_acpi.c +++ b/src/cpu/amd/family_10h-family_15h/powernow_acpi.c @@ -226,7 +226,7 @@ void amd_generate_powernow(u32 pcontrol_blk, u8 plen, u8 onlyBSP) fam10h_rev_e = 1; /* - * Based on the CPU socket type,cmp_cap and pwr_lmt , get the power limit. + * Based on the CPU socket type, cmp_cap and pwr_lmt, get the power limit. * socket_type : 0x10 SocketF; 0x11 AM2/ASB1; 0x12 S1G1 * cmp_cap : 0x0 SingleCore; 0x1 DualCore; 0x2 TripleCore; 0x3 QuadCore; 0x4 QuintupleCore; 0x5 HexCore */ diff --git a/src/cpu/amd/microcode/microcode.c b/src/cpu/amd/microcode/microcode.c index 541d5a81aa..68b6953be8 100644 --- a/src/cpu/amd/microcode/microcode.c +++ b/src/cpu/amd/microcode/microcode.c @@ -129,7 +129,7 @@ static void apply_microcode_patch(const struct microcode *m) msr = rdmsr(0x8b); new_patch_id = msr.lo; - UCODE_DEBUG("updated to patch id = 0x%08x %s\n", new_patch_id , + UCODE_DEBUG("updated to patch id = 0x%08x %s\n", new_patch_id, (new_patch_id == m->patch_id) ? "success" : "fail"); } |