diff options
| author | Nils Jacobs <njacobs8@hetnet.nl> | 2010-12-30 19:23:29 +0000 |
|---|---|---|
| committer | Stefan Reinauer <stepan@openbios.org> | 2010-12-30 19:23:29 +0000 |
| commit | 8098e429445723a60cf7772777385259e2c498bb (patch) | |
| tree | 616064ee9a2e2ef9ac9a83dd3b03f5220baae484 /src/cpu/amd | |
| parent | 8cf54c9f236afef6b74b6510983bd25e8536055a (diff) | |
Remove duplicated GX2 processor IIOC mode setting on CS5535 southbridge code
and fix CIS mode comments.
Signed-off-by: Nils Jacobs <njacobs8@hetnet.nl>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6225 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/cpu/amd')
| -rw-r--r-- | src/cpu/amd/model_gx2/cpureginit.c | 9 |
1 files changed, 3 insertions, 6 deletions
diff --git a/src/cpu/amd/model_gx2/cpureginit.c b/src/cpu/amd/model_gx2/cpureginit.c index cfb86aa327..0fc852d531 100644 --- a/src/cpu/amd/model_gx2/cpureginit.c +++ b/src/cpu/amd/model_gx2/cpureginit.c @@ -88,16 +88,13 @@ void cpuRegInit (void) msr.lo = 0x00000603C; wrmsr(msrnum, msr); -/* Only do this if we are building for 5535 */ /* FooGlue Setup */ -#if 1 - /* Enable CIS mode B in FooGlue */ - msrnum = MSR_FG + 0x10; + /* Set CS5535/CS5536 mode in FooGlue */ + msrnum = FG_GIO_MSR_SEL; msr = rdmsr(msrnum); msr.lo &= ~3; - msr.lo |= 2; /* ModeB */ + msr.lo |= 2; /* IIOC mode CS5535/CS5536 enable. (according to Jordan Crouse the databook is wrong bits 1:0 have to be 2 instead of 1) */ wrmsr(msrnum, msr); -#endif /* Disable DOT PLL. Graphics init will enable it if needed. */ msrnum = GLCP_DOTPLL; |