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authorLi-Ta Lo <ollie@lanl.gov>2005-01-19 23:19:26 +0000
committerLi-Ta Lo <ollie@lanl.gov>2005-01-19 23:19:26 +0000
commitbec039cb93b72b068370662933d961b1cd4aeaea (patch)
treefe17932d8215153fe84ea142072a2b956e2a5d0a /src/cpu/amd
parentaf021575308fffc104a7add2ba8183cef079876c (diff)
minor reformat
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1892 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/cpu/amd')
-rw-r--r--src/cpu/amd/mtrr/amd_mtrr.c9
1 files changed, 2 insertions, 7 deletions
diff --git a/src/cpu/amd/mtrr/amd_mtrr.c b/src/cpu/amd/mtrr/amd_mtrr.c
index 506e017457..58a830c9b4 100644
--- a/src/cpu/amd/mtrr/amd_mtrr.c
+++ b/src/cpu/amd/mtrr/amd_mtrr.c
@@ -17,7 +17,6 @@ static unsigned long resk(uint64_t value)
return resultk;
}
-#if 1
static unsigned fixed_mtrr_index(unsigned long addrk)
{
unsigned index;
@@ -34,7 +33,6 @@ static unsigned fixed_mtrr_index(unsigned long addrk)
return index;
}
-
static unsigned int mtrr_msr[] = {
MTRRfix64K_00000_MSR, MTRRfix16K_80000_MSR, MTRRfix16K_A0000_MSR,
MTRRfix4K_C0000_MSR, MTRRfix4K_C8000_MSR, MTRRfix4K_D0000_MSR, MTRRfix4K_D8000_MSR,
@@ -98,14 +96,11 @@ static void set_fixed_mtrr_resource(void *gp, struct device *dev, struct resourc
return;
}
printk_debug("Setting fixed MTRRs(%d-%d) Type: WB\n",
- start_mtrr, last_mtrr);
+ start_mtrr, last_mtrr);
set_fixed_mtrrs(start_mtrr, last_mtrr, MTRR_TYPE_WRBACK | MTRR_READ_MEM | MTRR_WRITE_MEM);
}
-
-#endif
-
void amd_setup_mtrrs(void)
{
struct mem_state state;
@@ -120,7 +115,7 @@ void amd_setup_mtrrs(void)
printk_debug("\n");
/* Initialized the fixed_mtrrs to uncached */
printk_debug("Setting fixed MTRRs(%d-%d) type: UC\n",
- 0, NUM_FIXED_RANGES);
+ 0, NUM_FIXED_RANGES);
set_fixed_mtrrs(0, NUM_FIXED_RANGES, MTRR_TYPE_UNCACHEABLE);
/* Except for the PCI MMIO hole just before 4GB there are no