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authorTimothy Pearson <tpearson@raptorengineeringinc.com>2015-06-02 20:25:03 -0500
committerStefan Reinauer <stefan.reinauer@coreboot.org>2015-07-07 01:41:59 +0200
commitfb39f82116f0411ee85e3d91bfd97237c34debbb (patch)
tree5a3f3ce0fff3b021f081aa8e5a29acc5f9c21b91 /src/cpu/amd
parenta97e0075a22af82ede8ab70a7e26d2a9e88490ea (diff)
cpu/amd/car: Move AP stacks below the BSP stack to free up space
Caching SPD data during startup requires additional CAR space. There was a large chunk of free space between the AP stack top and the BSP stack bottom; moving the AP stacks below the BSP stack allows this space to be utilized. TEST: Booted ASUS KGPE-D16 with dual Opteron 6129 processors (16 cores) and 120k of CAR. Change-Id: I370ff368affde7061d6547527bda058b9016e977 Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com> Reviewed-on: http://review.coreboot.org/10404 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
Diffstat (limited to 'src/cpu/amd')
-rw-r--r--src/cpu/amd/car/cache_as_ram.inc15
-rw-r--r--src/cpu/amd/geode_gx2/Kconfig4
-rw-r--r--src/cpu/amd/geode_lx/Kconfig4
-rw-r--r--src/cpu/amd/model_10xxx/Kconfig4
-rw-r--r--src/cpu/amd/model_10xxx/init_cpus.c5
-rw-r--r--src/cpu/amd/socket_754/Kconfig4
-rw-r--r--src/cpu/amd/socket_940/Kconfig4
-rw-r--r--src/cpu/amd/socket_S1G1/Kconfig4
8 files changed, 40 insertions, 4 deletions
diff --git a/src/cpu/amd/car/cache_as_ram.inc b/src/cpu/amd/car/cache_as_ram.inc
index 51ebba60f7..ac6ea33b98 100644
--- a/src/cpu/amd/car/cache_as_ram.inc
+++ b/src/cpu/amd/car/cache_as_ram.inc
@@ -26,6 +26,7 @@
#define CacheSize CONFIG_DCACHE_RAM_SIZE
#define CacheBase (0xd0000 - CacheSize)
#define CacheSizeBSPStack CONFIG_DCACHE_BSP_STACK_SIZE
+#define CacheSizeBSPSlush CONFIG_DCACHE_BSP_STACK_SLUSH
/* For CAR with Fam10h. */
#define CacheSizeAPStack CONFIG_DCACHE_AP_STACK_SIZE
@@ -377,9 +378,17 @@ CAR_FAM10_ap:
/*
* Need to set stack pointer for AP.
* It will be from:
- * CacheBase + CacheSize / 2
+ * CacheBase + (CacheSize - (CacheSizeBSPStack + CacheSizeBSPSlush))
* - (NodeID << CoreIDbits + CoreID) * CacheSizeAPStack
- * So need to get the NodeID and CoreID at first.
+ * The spacing between the BSP stack and the top of the AP
+ * stacks is purposefully set larger (an extra CacheSizeBSPSlush
+ * worth of unused space) than necessary to aid debugging when
+ * additional stack variables are added by future developers.
+ * The extra space will allow BSP overruns to be caught by
+ * the warning logic and easily fixed instead of crashing the
+ * system with no obvious clues of what went wrong.
+ *
+ * So, need to get the NodeID and CoreID at first.
* If NB_CFG bit 54 is set just use initial APIC ID, otherwise need
* to reverse it.
*/
@@ -411,7 +420,7 @@ roll_cfg:
/* Calculate stack pointer. */
movl $CacheSizeAPStack, %eax
mull %ebx
- movl $(CacheBase + CacheSize / 2), %esp
+ movl $(CacheBase + (CacheSize - (CacheSizeBSPStack + CacheSizeBSPSlush))), %esp
subl %eax, %esp
/* Retrive init detected. */
diff --git a/src/cpu/amd/geode_gx2/Kconfig b/src/cpu/amd/geode_gx2/Kconfig
index b867e3701b..1b56d5d4b1 100644
--- a/src/cpu/amd/geode_gx2/Kconfig
+++ b/src/cpu/amd/geode_gx2/Kconfig
@@ -41,6 +41,10 @@ config DCACHE_BSP_STACK_SIZE
hex
default 0x1000
+config DCACHE_BSP_STACK_SLUSH
+ hex
+ default 0x1000
+
config DCACHE_AP_STACK_SIZE
hex
default 0x400
diff --git a/src/cpu/amd/geode_lx/Kconfig b/src/cpu/amd/geode_lx/Kconfig
index d799d6b394..d707bea980 100644
--- a/src/cpu/amd/geode_lx/Kconfig
+++ b/src/cpu/amd/geode_lx/Kconfig
@@ -23,6 +23,10 @@ config DCACHE_BSP_STACK_SIZE
hex
default 0x2000
+config DCACHE_BSP_STACK_SLUSH
+ hex
+ default 0x1000
+
config DCACHE_AP_STACK_SIZE
hex
default 0x400
diff --git a/src/cpu/amd/model_10xxx/Kconfig b/src/cpu/amd/model_10xxx/Kconfig
index 4b5cdedaa1..ebd282a5ca 100644
--- a/src/cpu/amd/model_10xxx/Kconfig
+++ b/src/cpu/amd/model_10xxx/Kconfig
@@ -34,6 +34,10 @@ config DCACHE_BSP_STACK_SIZE
hex
default 0x2000
+config DCACHE_BSP_STACK_SLUSH
+ hex
+ default 0x1000
+
config DCACHE_AP_STACK_SIZE
hex
default 0x400
diff --git a/src/cpu/amd/model_10xxx/init_cpus.c b/src/cpu/amd/model_10xxx/init_cpus.c
index 7e79307c89..4c72848986 100644
--- a/src/cpu/amd/model_10xxx/init_cpus.c
+++ b/src/cpu/amd/model_10xxx/init_cpus.c
@@ -250,8 +250,11 @@ static u32 init_cpus(u32 cpu_init_detectedx, struct sys_info *sysinfo)
u32 apicid;
struct node_core_id id;
+ /* Please refer to the calculations and explaination in cache_as_ram.inc before modifying these values */
uint32_t max_ap_stack_region_size = CONFIG_MAX_CPUS * CONFIG_DCACHE_AP_STACK_SIZE;
- uint32_t bsp_stack_region_lower_boundary = CONFIG_DCACHE_RAM_BASE + (CONFIG_DCACHE_RAM_SIZE / 2);
+ uint32_t max_bsp_stack_region_size = CONFIG_DCACHE_BSP_STACK_SIZE + CONFIG_DCACHE_BSP_STACK_SLUSH;
+ uint32_t bsp_stack_region_upper_boundary = CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE;
+ uint32_t bsp_stack_region_lower_boundary = bsp_stack_region_upper_boundary - max_bsp_stack_region_size;
void * lower_stack_region_boundary = (void*)(bsp_stack_region_lower_boundary - max_ap_stack_region_size);
if (((void*)(sysinfo + 1)) > lower_stack_region_boundary)
printk(BIOS_WARNING,
diff --git a/src/cpu/amd/socket_754/Kconfig b/src/cpu/amd/socket_754/Kconfig
index 395fc788c4..aeda4210f4 100644
--- a/src/cpu/amd/socket_754/Kconfig
+++ b/src/cpu/amd/socket_754/Kconfig
@@ -24,6 +24,10 @@ config DCACHE_BSP_STACK_SIZE
hex
default 0x2000
+config DCACHE_BSP_STACK_SLUSH
+ hex
+ default 0x1000
+
config DCACHE_AP_STACK_SIZE
hex
default 0x400
diff --git a/src/cpu/amd/socket_940/Kconfig b/src/cpu/amd/socket_940/Kconfig
index a481ded55a..a8eef61b0f 100644
--- a/src/cpu/amd/socket_940/Kconfig
+++ b/src/cpu/amd/socket_940/Kconfig
@@ -25,6 +25,10 @@ config DCACHE_BSP_STACK_SIZE
hex
default 0x2000
+config DCACHE_BSP_STACK_SLUSH
+ hex
+ default 0x1000
+
config DCACHE_AP_STACK_SIZE
hex
default 0x400
diff --git a/src/cpu/amd/socket_S1G1/Kconfig b/src/cpu/amd/socket_S1G1/Kconfig
index 2c79e1fca5..01d84a1d3a 100644
--- a/src/cpu/amd/socket_S1G1/Kconfig
+++ b/src/cpu/amd/socket_S1G1/Kconfig
@@ -35,6 +35,10 @@ config DCACHE_BSP_STACK_SIZE
hex
default 0x2000
+config DCACHE_BSP_STACK_SLUSH
+ hex
+ default 0x1000
+
config DCACHE_AP_STACK_SIZE
hex
default 0x400