AMD Socket ASB2 and AM3 support.

Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5482 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

4 files changed, 107 insertions, 0 deletions

diff --git a/src/cpu/amd/socket_ASB2/Kconfig b/src/cpu/amd/socket_ASB2/Kconfig
new file mode 100644
index 0000000000..3aa95c300f
--- /dev/null
+++ b/src/cpu/amd/socket_ASB2/Kconfig
@@ -0,0 +1,46 @@
+config CPU_AMD_SOCKET_ASB2
+	bool
+	select CPU_AMD_MODEL_10XXX
+	select HT3_SUPPORT
+	select PCI_IO_CFG_EXT
+
+config CPU_SOCKET_TYPE
+	hex
+	default 0x13
+	depends on CPU_AMD_SOCKET_ASB2
+
+# DDR3 and REG
+config DIMM_SUPPORT
+	hex
+	default 0x0005
+	depends on CPU_AMD_SOCKET_ASB2
+
+config EXT_RT_TBL_SUPPORT
+	bool
+	default n
+	depends on CPU_AMD_SOCKET_ASB2
+
+config EXT_CONF_SUPPORT
+	bool
+	default n
+	depends on CPU_AMD_SOCKET_ASB2
+
+config CBB
+	hex
+	default 0x0
+	depends on CPU_AMD_SOCKET_ASB2
+
+config CDB
+	hex
+	default 0x18
+	depends on CPU_AMD_SOCKET_ASB2
+
+config XIP_ROM_BASE
+	hex
+	default 0xfff80000
+	depends on CPU_AMD_SOCKET_ASB2
+
+config XIP_ROM_SIZE
+	hex
+	default 0x80000
+	depends on CPU_AMD_SOCKET_ASB2
diff --git a/src/cpu/amd/socket_ASB2/Makefile.inc b/src/cpu/amd/socket_ASB2/Makefile.inc
new file mode 100644
index 0000000000..580cbbce2d
--- /dev/null
+++ b/src/cpu/amd/socket_ASB2/Makefile.inc
@@ -0,0 +1,13 @@
+obj-y += socket_ASB2.o
+subdirs-y += ../model_10xxx
+subdirs-y += ../quadcore
+subdirs-y += ../mtrr
+subdirs-y += ../microcode
+subdirs-y += ../../x86/tsc
+subdirs-y += ../../x86/lapic
+subdirs-y += ../../x86/cache
+subdirs-y += ../../x86/pae
+subdirs-y += ../../x86/smm
+subdirs-y += ../../x86/mtrr
+
+cpu_incs += $(src)/cpu/amd/car/cache_as_ram.inc
diff --git a/src/cpu/amd/socket_ASB2/chip.h b/src/cpu/amd/socket_ASB2/chip.h
new file mode 100644
index 0000000000..3a53696630
--- /dev/null
+++ b/src/cpu/amd/socket_ASB2/chip.h
@@ -0,0 +1,23 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2010 Advanced Micro Devices, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+ */
+
+extern struct chip_operations cpu_amd_socket_ASB2_ops;
+
+struct cpu_amd_socket_ASB2_config {
+};
diff --git a/src/cpu/amd/socket_ASB2/socket_ASB2.c b/src/cpu/amd/socket_ASB2/socket_ASB2.c
new file mode 100644
index 0000000000..fd3b522aa5
--- /dev/null
+++ b/src/cpu/amd/socket_ASB2/socket_ASB2.c
@@ -0,0 +1,25 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2010 Advanced Micro Devices, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+ */
+
+#include <device/device.h>
+#include "chip.h"
+
+struct chip_operations cpu_amd_socket_ASB2_ops = {
+	CHIP_NAME("socket ASB2")
+};