diff options
| author | Evelyn Huang <evhuang@google.com> | 2017-05-30 16:05:58 -0600 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2017-08-01 23:02:11 +0000 |
| commit | 284409fd8cec208b2c3af039a024f7ddb69576b2 (patch) | |
| tree | 502ee2116fdc13e4a41970369c00e2b80c89dcfb /src/cpu/amd/quadcore/amd_sibling.c | |
| parent | 0182aea283713977e0f5c697f78bd4c26df2f72c (diff) | |
src/cpu/amd/quadcore: Fix checkpatch errors/warnings
Fix over 80 character line warnings, unncessary braces for single
statement blocks warnings, include space before and after =, <, >
warnings, spaces after open parantheses warnings
Change-Id: Ib0a28c12e209547b3625f4ca1696f9c26dc2b6d0
Signed-off-by: Evelyn Huang <evhuang@google.com>
Reviewed-on: https://review.coreboot.org/19987
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/cpu/amd/quadcore/amd_sibling.c')
| -rw-r--r-- | src/cpu/amd/quadcore/amd_sibling.c | 25 |
1 files changed, 14 insertions, 11 deletions
diff --git a/src/cpu/amd/quadcore/amd_sibling.c b/src/cpu/amd/quadcore/amd_sibling.c index a04ec558c0..129e025b7c 100644 --- a/src/cpu/amd/quadcore/amd_sibling.c +++ b/src/cpu/amd/quadcore/amd_sibling.c @@ -38,16 +38,15 @@ static u32 get_max_siblings(u32 nodes) { device_t dev; u32 nodeid; - u32 siblings=0; + u32 siblings = 0; //get max siblings from all the nodes - for (nodeid=0; nodeid<nodes; nodeid++){ + for (nodeid = 0; nodeid < nodes; nodeid++) { int j; dev = get_node_pci(nodeid, 3); j = (pci_read_config32(dev, 0xe8) >> 12) & 3; - if (siblings < j) { + if (siblings < j) siblings = j; - } } return siblings; @@ -60,7 +59,7 @@ static void enable_apic_ext_id(u32 nodes) u32 nodeid; //enable APIC_EXIT_ID all the nodes - for (nodeid=0; nodeid<nodes; nodeid++){ + for (nodeid = 0; nodeid < nodes; nodeid++) { u32 val; dev = get_node_pci(nodeid, 0); val = pci_read_config32(dev, 0x68); @@ -82,9 +81,11 @@ u32 get_apicid_base(u32 ioapic_num) siblings = get_max_siblings(sysconf.nodes); - if (sysconf.bsp_apicid > 0) { // IOAPIC could start from 0 + if (sysconf.bsp_apicid > 0) { + // IOAPIC could start from 0 return 0; - } else if (sysconf.enabled_apic_ext_id) { // enabled ext id but bsp = 0 + } else if (sysconf.enabled_apic_ext_id) { + // enabled ext id but bsp = 0 return 1; } @@ -93,7 +94,7 @@ u32 get_apicid_base(u32 ioapic_num) //Construct apicid_base - if ((!disable_siblings) && (siblings>0) ) { + if ((!disable_siblings) && (siblings > 0)) { /* for 8 way dual core, we will used up apicid 16:16, actually 16 is not allowed by current kernel and the kernel will try to get one that is small than 16 to make IOAPIC work. I don't @@ -101,14 +102,16 @@ u32 get_apicid_base(u32 ioapic_num) (APIC_EXT_ID is enabled) */ //4:10 for two way 8:12 for four way 16:16 for eight way - //Use CONFIG_MAX_PHYSICAL_CPUS instead of nodes for better consistency? - apicid_base = nb_cfg_54 ? (siblings+1) * sysconf.nodes : 8 * siblings + sysconf.nodes; + //Use CONFIG_MAX_PHYSICAL_CPUS instead of nodes + //for better consistency? + apicid_base = nb_cfg_54 ? (siblings+1) * sysconf.nodes : + 8 * siblings + sysconf.nodes; } else { apicid_base = sysconf.nodes; } - if ((apicid_base+ioapic_num-1)>0xf) { + if ((apicid_base+ioapic_num-1) > 0xf) { // We need to enable APIC EXT ID printk(BIOS_SPEW, "if the IOAPIC device doesn't support 256 APIC id,\n you need to set CONFIG_ENABLE_APIC_EXT_ID in MB Option.lb so you can spare 16 id for IOAPIC\n"); enable_apic_ext_id(sysconf.nodes); |