diff options
| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2017-04-13 16:34:52 +0300 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2017-07-17 19:25:57 +0000 |
| commit | 044dec27b4e32d5bd52e38b7242319f984feb010 (patch) | |
| tree | 12b616520bb79099d639573988160c76fd17255d /src/cpu/amd/pi/Makefile.inc | |
| parent | b6a0fe59fc19301090c928661904b290ce004ad0 (diff) | |
binaryPI: Switch to agesa/heapmanager.c
Essentially squashes following commits from AGESA side.
45ff9cb AGESA: Reduce typecasting in heapmanager calls
bceccec AGESA: Handle HEAP_CALLOUT_RUNTIME allocation more cleanly
4240277 AGESA: Adjust heap location for S3 resume path
424c639 AGESA: Refactor S3 support functions
50e6daf AGESA: Log heap initialisation
da74041 AGESA: Move heap allocator declarations
c74b53f AGESA: Reduce SPI use by 24kB for S3 support
b1fcbf3 AGESA: Separate HeapManager declarations from BiosCallOuts
f728408 AGESA: Split S3 backup in CBMEM
82fbda7 AGESA: Use same HeapManager for all BiosCallOuts
Change-Id: I537bd05a3e06ff6896f1ac8be93eed5321ca472b
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/19271
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/cpu/amd/pi/Makefile.inc')
| -rw-r--r-- | src/cpu/amd/pi/Makefile.inc | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/cpu/amd/pi/Makefile.inc b/src/cpu/amd/pi/Makefile.inc index 3b3f7accc9..ecbc386fb6 100644 --- a/src/cpu/amd/pi/Makefile.inc +++ b/src/cpu/amd/pi/Makefile.inc @@ -21,6 +21,6 @@ ramstage-$(CONFIG_SPI_FLASH) += spi.c cpu_incs-y += $(src)/cpu/amd/pi/cache_as_ram.inc -romstage-y += heapmanager.c -ramstage-y += heapmanager.c +romstage-y += ../agesa/heapmanager.c +ramstage-y += ../agesa/heapmanager.c ramstage-y += amd_late_init.c |