diff options
| author | Marc Jones <marcj303@gmail.com> | 2016-09-20 20:06:43 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-11-02 18:32:37 +0100 |
| commit | a998fbd7cee96780407cacdd4caccbc2560d9985 (patch) | |
| tree | aa6ae0858003bc6f0c7d897aeb62630c5599b21b /src/cpu/amd/pi/00670F00/Kconfig | |
| parent | 1a5e32c92966e69399acd154abf9c9e513373ce6 (diff) | |
cpu/amd: Copy 00660F01 to 00670F00
Prepare for new 00670F00 (StoneyRidge) support.
Original-Signed-off-by: Marc Jones <marcj303@gmail.com>
Original-Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Original-Tested-by: Marshall Dawson <marshalldawson3rd@gmail.com>
(cherry picked from commit 87d26e05189247685df0ca6492dc3181a1bad5e8)
Change-Id: Ib296ad32a061669b28dae742cac08bb75fdd0de4
Signed-off-by: Marc Jones <marcj303@gmail.com>
Reviewed-on: https://review.coreboot.org/17139
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/cpu/amd/pi/00670F00/Kconfig')
| -rw-r--r-- | src/cpu/amd/pi/00670F00/Kconfig | 52 |
1 files changed, 52 insertions, 0 deletions
diff --git a/src/cpu/amd/pi/00670F00/Kconfig b/src/cpu/amd/pi/00670F00/Kconfig new file mode 100644 index 0000000000..de74d3c506 --- /dev/null +++ b/src/cpu/amd/pi/00670F00/Kconfig @@ -0,0 +1,52 @@ +# +# This file is part of the coreboot project. +# +# Copyright (C) 2015 Advanced Micro Devices, Inc. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; version 2 of the License. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# + +config CPU_AMD_PI_00660F01 + bool + select PCI_IO_CFG_EXT + select X86_AMD_FIXED_MTRRS + +if CPU_AMD_PI_00660F01 + +config CPU_ADDR_BITS + int + default 48 + +config EXT_CONF_SUPPORT + bool + default n + +config CBB + hex + default 0x0 + +config CDB + hex + default 0x18 + +config XIP_ROM_SIZE + hex + default 0x100000 + +config HAVE_INIT_TIMER + bool + default y + +config HIGH_SCRATCH_MEMORY_SIZE + hex + # Assume the maximum size of stack as (0xA0000 - 0x30000 + 0x1000) + default 0xA1000 + +endif |