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authorKyösti Mälkki <kyosti.malkki@gmail.com>2019-12-15 21:37:38 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2019-12-20 15:47:39 +0000
commitfedaac84da5bcfd035e0e348150db8cf3d800726 (patch)
treea60bb306e8539a6bdad743e5a381129e011c20b0 /src/cpu/amd/pi/00660F01
parentfa0df7d316fc9b4be825b7ad60ada844660202c6 (diff)
AGESA,binaryPI: Enable lapic early for udelay()
Change-Id: I7200ac0256748d9372fc39be27b86d1c93b38321 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37756 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Diffstat (limited to 'src/cpu/amd/pi/00660F01')
-rw-r--r--src/cpu/amd/pi/00660F01/fixme.c6
1 files changed, 0 insertions, 6 deletions
diff --git a/src/cpu/amd/pi/00660F01/fixme.c b/src/cpu/amd/pi/00660F01/fixme.c
index 237d52b2c1..7d71e2ea1a 100644
--- a/src/cpu/amd/pi/00660F01/fixme.c
+++ b/src/cpu/amd/pi/00660F01/fixme.c
@@ -91,10 +91,4 @@ void amd_initmmio(void)
LibAmdMsrWrite(MTRR_PHYS_BASE(6), &MsrReg, &StdHeader);
MsrReg = ((1ULL << CONFIG_CPU_ADDR_BITS) - CACHE_ROM_SIZE) | 0x800ull;
LibAmdMsrWrite(MTRR_PHYS_MASK(6), &MsrReg, &StdHeader);
-
- if (CONFIG(UDELAY_LAPIC)) {
- LibAmdMsrRead(0x1B, &MsrReg, &StdHeader);
- MsrReg |= 1 << 11;
- LibAmdMsrWrite(0x1B, &MsrReg, &StdHeader);
- }
}