diff options
| author | Evelyn Huang <evhuang@google.com> | 2017-06-07 14:20:09 -0600 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2017-08-01 23:01:56 +0000 |
| commit | 0182aea283713977e0f5c697f78bd4c26df2f72c (patch) | |
| tree | 032000c8a1dc7fffb175e6ba5c3aa49f391451d6 /src/cpu/amd/pi/00660F01/model_15_init.c | |
| parent | 67ce5052fee271f3bfea841be701aeb61c1769b3 (diff) | |
cpu/amd/pi: Fix checkpatch warnings and errors
Fix remaining space prohibited between function name and open
parenthesis, line over 80 characters, unnecessary braces for single
statement blocks, space required before open brace errors and warnings
in subdirectories of src/cpu/amd/pi
Change-Id: I177ffe98a3674bd700a39eb8073db34adf9499b4
Signed-off-by: Evelyn Huang <evhuang@google.com>
Reviewed-on: https://review.coreboot.org/20098
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/cpu/amd/pi/00660F01/model_15_init.c')
| -rw-r--r-- | src/cpu/amd/pi/00660F01/model_15_init.c | 15 |
1 files changed, 7 insertions, 8 deletions
diff --git a/src/cpu/amd/pi/00660F01/model_15_init.c b/src/cpu/amd/pi/00660F01/model_15_init.c index 8f739cf3b6..bf4bc241eb 100644 --- a/src/cpu/amd/pi/00660F01/model_15_init.c +++ b/src/cpu/amd/pi/00660F01/model_15_init.c @@ -40,11 +40,11 @@ void PSPProgBar3Msr(void *Buffer) u32 Bar3Addr; u64 Tmp64; /* Get Bar3 Addr */ - Bar3Addr = PspLibPciReadPspConfig (0x20); + Bar3Addr = PspLibPciReadPspConfig(0x20); Tmp64 = Bar3Addr; printk(BIOS_DEBUG, "Bar3=%llx\n", Tmp64); - LibAmdMsrWrite (0xC00110A2, &Tmp64, NULL); - LibAmdMsrRead (0xC00110A2, &Tmp64, NULL); + LibAmdMsrWrite(0xC00110A2, &Tmp64, NULL); + LibAmdMsrRead(0xC00110A2, &Tmp64, NULL); } static void model_15_init(device_t dev) @@ -58,7 +58,7 @@ static void model_15_init(device_t dev) u32 siblings; #endif - disable_cache (); + disable_cache(); /* Enable access to AMD RdDram and WrDram extension bits */ msr = rdmsr(SYSCFG_MSR); msr.lo |= SYSCFG_MSR_MtrrFixDramModEn; @@ -67,12 +67,12 @@ static void model_15_init(device_t dev) // BSP: make a0000-bffff UC, c0000-fffff WB msr.lo = msr.hi = 0; - wrmsr (0x259, msr); + wrmsr(0x259, msr); msr.lo = msr.hi = 0x1e1e1e1e; wrmsr(0x250, msr); wrmsr(0x258, msr); for (msrno = 0x268; msrno <= 0x26f; msrno++) - wrmsr (msrno, msr); + wrmsr(msrno, msr); msr = rdmsr(SYSCFG_MSR); msr.lo &= ~SYSCFG_MSR_MtrrFixDramModEn; @@ -85,9 +85,8 @@ static void model_15_init(device_t dev) /* zero the machine check error status registers */ msr.lo = 0; msr.hi = 0; - for (i = 0; i < 6; i++) { + for (i = 0; i < 6; i++) wrmsr(MCI_STATUS + (i * 4), msr); - } /* Enable the local CPU APICs */ |