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| author | Yinghai Lu <yinghailu@gmail.com> | 2005-12-14 20:08:23 +0000 |
|---|---|---|
| committer | Yinghai Lu <yinghailu@gmail.com> | 2005-12-14 20:08:23 +0000 |
| commit | 6f63c0297c3e3f31674dbbf193635921b5c20e15 (patch) | |
| tree | 94facb1e3908fb0dd9f98d59c886a0a6de5da522 /src/cpu/amd/mtrr | |
| parent | 72ee9b0ebefa98e05867712eb303269836ec69b4 (diff) | |
support HDT disassembly when cache as ram auto stage
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2143 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/cpu/amd/mtrr')
0 files changed, 0 insertions, 0 deletions