diff options
| author | Elyes HAOUAS <ehaouas@noos.fr> | 2016-08-23 21:07:28 +0200 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-08-28 18:47:23 +0200 |
| commit | cbe7464c623d148c96974f0ce8724ead0ad5478d (patch) | |
| tree | e47ead759132c68dbbd5a498184c3ef2c46f8b75 /src/cpu/amd/mtrr/amd_mtrr.c | |
| parent | 3f4aece4e07b15a5a2d191873da04b88c8e87049 (diff) | |
src/cpu: Add required space before opening parenthesis '('
Change-Id: I7fb9bfcaeec0b9dfd0695d2b2d398fd01091f6bc
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16286
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Omar Pakker
Diffstat (limited to 'src/cpu/amd/mtrr/amd_mtrr.c')
| -rw-r--r-- | src/cpu/amd/mtrr/amd_mtrr.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/cpu/amd/mtrr/amd_mtrr.c b/src/cpu/amd/mtrr/amd_mtrr.c index 6df8458ac1..a0a51943ab 100644 --- a/src/cpu/amd/mtrr/amd_mtrr.c +++ b/src/cpu/amd/mtrr/amd_mtrr.c @@ -88,7 +88,7 @@ void amd_setup_mtrrs(void) (((cpu_id>>20 )&0xf) > 0) || // ExtendedFamily > 0 ((((cpu_id>>8 )&0xf) == 0xf) && // Family == 0F (((cpu_id>>16)&0xf) >= 0x4)); // Rev>=F deduced from rev tables - if(has_tom2wb) + if (has_tom2wb) printk(BIOS_DEBUG, "CPU is Fam 0Fh rev.F or later. We can use TOM2WB for any memory above 4GB\n"); /* Enable the access to AMD RdDram and WrDram extension bits */ @@ -109,7 +109,7 @@ void amd_setup_mtrrs(void) sys_cfg.lo &= ~(SYSCFG_MSR_TOM2En | SYSCFG_MSR_TOM2WB); if (bsp_topmem2() > (uint64_t)1<<32) { sys_cfg.lo |= SYSCFG_MSR_TOM2En; - if(has_tom2wb) + if (has_tom2wb) sys_cfg.lo |= SYSCFG_MSR_TOM2WB; } @@ -117,7 +117,7 @@ void amd_setup_mtrrs(void) * undefined side effects. */ msr.lo = msr.hi = 0; - for(i = IORR_FIRST; i <= IORR_LAST; i++) { + for (i = IORR_FIRST; i <= IORR_LAST; i++) { wrmsr(i, msr); } |