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authorKyösti Mälkki <kyosti.malkki@gmail.com>2017-07-13 13:14:16 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2017-08-22 20:24:31 +0000
commitb98391c0ee3d9d95b3c256e3ce170ff52b98b2c4 (patch)
tree95db27ec9a2a183f935bd1f3c62103d71be425d2 /src/cpu/amd/model_fxx
parenta429761b7befa46f638e6fa2e5dc83fc2a2d46cb (diff)
AMD K8 fam10-15: Tidy up CAR disable
Avoid conflicting disable_cache_as_ram() declaration and tidy up include for inlined function. Change-Id: Iba77c711f5eb023566b7d8ba148583948661bc99 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/20563 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/cpu/amd/model_fxx')
-rw-r--r--src/cpu/amd/model_fxx/Makefile.inc1
-rw-r--r--src/cpu/amd/model_fxx/init_cpus.c4
2 files changed, 3 insertions, 2 deletions
diff --git a/src/cpu/amd/model_fxx/Makefile.inc b/src/cpu/amd/model_fxx/Makefile.inc
index 4d8153a153..4e89f40d3e 100644
--- a/src/cpu/amd/model_fxx/Makefile.inc
+++ b/src/cpu/amd/model_fxx/Makefile.inc
@@ -1,4 +1,5 @@
romstage-y += ../../x86/mtrr/earlymtrr.c
+romstage-y += ../car/post_cache_as_ram.c
# no conditionals here. If you include this file from a socket, then you get all the binaries.
ramstage-y += model_fxx_init.c
diff --git a/src/cpu/amd/model_fxx/init_cpus.c b/src/cpu/amd/model_fxx/init_cpus.c
index 6aff4b0c62..dae489b34f 100644
--- a/src/cpu/amd/model_fxx/init_cpus.c
+++ b/src/cpu/amd/model_fxx/init_cpus.c
@@ -15,7 +15,7 @@
#include <cpu/x86/lapic.h>
#include <cpu/x86/mtrr.h>
#include <northbridge/amd/amdk8/amdk8.h>
-#include "cpu/amd/car/post_cache_as_ram.c"
+#include "cpu/amd/car/disable_cache_as_ram.c"
#if IS_ENABLED(CONFIG_HAVE_OPTION_TABLE)
#include "option_table.h"
@@ -220,7 +220,7 @@ static void enable_apic_ext_id(u32 node)
static void STOP_CAR_AND_CPU(void)
{
- disable_cache_as_ram(0); // inline
+ disable_cache_as_ram_real(0); // inline
/* stop all cores except node0/core0 the bsp .... */
stop_this_cpu();
}