diff options
author | Paul Menzel <paulepanter@users.sourceforge.net> | 2013-10-29 20:41:50 +0100 |
---|---|---|
committer | Rudolf Marek <r.marek@assembler.cz> | 2014-01-15 22:20:20 +0100 |
commit | be8d23a3b5f07886edd0d263b75628b75533e6d5 (patch) | |
tree | 7325dfbda116600ee5c6b635893b8e73e8f00373 /src/cpu/amd/model_fxx | |
parent | 01d06dc67b3d4fdce450bb738eef6c17450c5fb8 (diff) |
cpu/amd/model_fxx/powernow_acpi.c: Comment out set but unused variable `Start_vid`
When adding support for PSS object generation for AMD pre Family Fh CPUs
(199c694f) the function `pstates_algorithm` was copied and adapted, but
`Start_vid` is not needed anymore as a static table is used. I’d remove
the variable, but Ron Minnich requested to leave it there for
documentation purposes. So just comment it out.
Change-Id: I3002951d168cade6461941c16d78373c47792e13
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: http://review.coreboot.org/4036
Tested-by: build bot (Jenkins)
Reviewed-by: Rudolf Marek <r.marek@assembler.cz>
Diffstat (limited to 'src/cpu/amd/model_fxx')
-rw-r--r-- | src/cpu/amd/model_fxx/powernow_acpi.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/cpu/amd/model_fxx/powernow_acpi.c b/src/cpu/amd/model_fxx/powernow_acpi.c index af1e24b094..02e03069f1 100644 --- a/src/cpu/amd/model_fxx/powernow_acpi.c +++ b/src/cpu/amd/model_fxx/powernow_acpi.c @@ -758,7 +758,7 @@ static int pstates_algorithm(u32 pcontrol_blk, u8 plen, u8 onlyBSP) u16 Pstate_feq[MAXP+1]; u8 Pstate_vid[MAXP+1]; u32 Pstate_power[MAXP+1]; - u8 Max_fid, Start_fid, Start_vid, Max_vid; + u8 Max_fid, Start_fid, Max_vid; struct cpuid_result cpuid1; /* See if the CPUID(0x80000007) returned EDX[2:1]==11b */ @@ -777,7 +777,7 @@ static int pstates_algorithm(u32 pcontrol_blk, u8 plen, u8 onlyBSP) Max_fid = (msr.lo & 0x3F0000) >> 16; Max_vid = (msr.hi & 0x3F0000) >> 16; Start_fid = (msr.lo & 0x3F00) >> 8; - Start_vid = (msr.hi & 0x3F00) >> 8; + /* Start_vid = (msr.hi & 0x3F00) >> 8; */ cmp_cap = (pci_read_config16(dev_find_slot(0, PCI_DEVFN(0x18, 3)), 0xE8) & |