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authorXavi Drudis Ferran <xdrudis@tinet.cat>2011-02-28 03:53:47 +0000
committerMarc Jones <marc.jones@amd.com>2011-02-28 03:53:47 +0000
commit061c89e15d336b92b1e9fb2f9866c32f6496fb09 (patch)
tree77f900112cd766b4519a8d978247b412dad22863 /src/cpu/amd/model_10xxx
parentc3132105bdd35ba174cd0938847ebf292e2eda26 (diff)
Improving BKDG implementation of P-states,
CPU and northbridge frequency and voltage handling for Fam 10 in SVI mode. I don't understand what this was doing nor find docs for these regs Maybe it was left over from some copy & paste ? Signed-off-by: Xavi Drudis Ferran <xdrudis@tinet.cat> Acked-by: Marc Jones <marcj303@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6409 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/cpu/amd/model_10xxx')
-rw-r--r--src/cpu/amd/model_10xxx/fidvid.c13
1 files changed, 0 insertions, 13 deletions
diff --git a/src/cpu/amd/model_10xxx/fidvid.c b/src/cpu/amd/model_10xxx/fidvid.c
index 18e2a0762f..e1ee71a5a7 100644
--- a/src/cpu/amd/model_10xxx/fidvid.c
+++ b/src/cpu/amd/model_10xxx/fidvid.c
@@ -394,19 +394,6 @@ static void config_power_ctrl_misc_reg(device_t dev,u32 cpuRev, u8 procPkg) {
} else { /* SVI */
/* set slamVidMode to 1 for SVI */
dword |= VID_SLAM_ON;
-
- u32 dtemp = dword;
-
- /* Program F3xD8[PwrPlanes] according F3xA0[DulaVdd] */
- dword = pci_read_config32(dev, 0xD8);
-
- if (dtemp & DUAL_VDD_BIT)
- dword |= PWR_PLN_ON;
- else
- dword &= PWR_PLN_OFF;
- pci_write_config32(dev, 0xD8, dword);
-
- dword = dtemp;
}
/* set the rest of A0 since we're at it... */