diff options
author | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2014-10-18 10:21:14 +0200 |
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committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2014-12-16 21:17:36 +0100 |
commit | b59c5de056058899e5ea891d2fd65824a7df7887 (patch) | |
tree | 2692243976bcc1509d17bf96b4157c8d96fc7caf /src/cpu/amd/geode_gx1/cpu_setup.inc | |
parent | 71b214553c952e790219864767ba7882c9aaae1f (diff) |
Drop GX1, CS5330 and related boards
There is no Cache As Ram for these boards, let's get rid of them.
Change-Id: Ib41f8cd64fc9a440838aea86076d6514aacb301c
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/7117
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
Diffstat (limited to 'src/cpu/amd/geode_gx1/cpu_setup.inc')
-rw-r--r-- | src/cpu/amd/geode_gx1/cpu_setup.inc | 68 |
1 files changed, 0 insertions, 68 deletions
diff --git a/src/cpu/amd/geode_gx1/cpu_setup.inc b/src/cpu/amd/geode_gx1/cpu_setup.inc deleted file mode 100644 index d701f8d226..0000000000 --- a/src/cpu/amd/geode_gx1/cpu_setup.inc +++ /dev/null @@ -1,68 +0,0 @@ -/* - freebios/src/northbridge/nsc/gx1/cpu_setup.inc - - Copyright (c) 2002 Christer Weinigel <wingel@hack.org> - - Initialize the GX1 CPU configuration registers -*/ - -/* USES: esi, ecx, eax */ - -#include <cpu/amd/gx1def.h> - - movl %eax, %ebp /* preserve bist */ - -cpu_setup_start: - leal cpu_setup_table, %esi - movl $cpu_setup_len, %ecx - -cpu_setup_loop: - movw (%esi), %ax - addl $2, %esi - outb %al, $0x22 - movb %ah, %al - outb %al, $0x23 - loop cpu_setup_loop - - movb $0xff, %al /* DIR1 -- Identification Register 1 */ - outb %al, $0x22 - inb $0x23, %al - cmpb $0x63, %al /* Revision for GXLV rev 3 */ - jbe cpu_no_ccr4 - - movb $0xe8, %al /* CCR4 */ - outb %al, $0x22 - inb $0x23, %al - orb $0x20, %al /* Enable FPU Fast Mode */ - outb %al, $0x23 - - movb $0xf0, %al /* PCR1 --- Performace Control */ - outb %al, $0x22 - inb $0x23, %al - orb $0x02, %al /* Incrementor on, whatever that is */ - outb %al, $0x23 - - movb $0x20, %al /* PCR0 --- Performace Control */ - outb %al, $0x22 - inb $0x23, %al - orb $0x20, %al /* Must be 1 according to data book */ - orb $0x04, %al /* Incrementor Margin 10 */ - outb %al, $0x23 -cpu_no_ccr4: - - jmp cpu_setup_end - -cpu_setup_table: - .byte 0xc1, 0x00 /* NO SMIs */ - .byte 0xc3, 0x14 /* Enable CPU config register */ - .byte 0x20, 0x00 - .byte 0xb8, GX_BASE>>30 /* Enable GXBASE address */ - .byte 0xc2, 0x00 - .byte 0xe8, 0x98 - .byte 0xc3, 0xf8 /* Enable CPU config register */ -cpu_setup_len = (.-cpu_setup_table)/2 - -cpu_setup_end: - nop - - movl %ebp, %eax /* Restore bist */ |