diff options
author | Stefan Reinauer <stepan@coresystems.de> | 2009-06-30 15:17:49 +0000 |
---|---|---|
committer | Stefan Reinauer <stepan@openbios.org> | 2009-06-30 15:17:49 +0000 |
commit | 0867062412dd4bfe5a556e5f3fd85ba5b682d79b (patch) | |
tree | 81ca5db12b8567b48daaa23a541bfb8a5dc011f8 /src/cpu/amd/dualcore | |
parent | 9702b6bf7ec5a4fb16934f1cf2724480e2460c89 (diff) |
This patch unifies the use of config options in v2 to all start with CONFIG_
It's basically done with the following script and some manual fixup:
VARS=`grep ^define src/config/Options.lb | cut -f2 -d\ | grep -v ^CONFIG | grep -v ^COREBOOT |grep -v ^CC`
for VAR in $VARS; do
find . -name .svn -prune -o -type f -exec perl -pi -e "s/(^|[^0-9a-zA-Z_]+)$VAR($|[^0-9a-zA-Z_]+)/\1CONFIG_$VAR\2/g" {} \;
done
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4381 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/cpu/amd/dualcore')
-rw-r--r-- | src/cpu/amd/dualcore/amd_sibling.c | 2 | ||||
-rw-r--r-- | src/cpu/amd/dualcore/dualcore.c | 16 |
2 files changed, 9 insertions, 9 deletions
diff --git a/src/cpu/amd/dualcore/amd_sibling.c b/src/cpu/amd/dualcore/amd_sibling.c index 899b859d4f..8401818fb6 100644 --- a/src/cpu/amd/dualcore/amd_sibling.c +++ b/src/cpu/amd/dualcore/amd_sibling.c @@ -110,7 +110,7 @@ unsigned get_apicid_base(unsigned ioapic_num) if((apicid_base+ioapic_num-1)>0xf) { // We need to enable APIC EXT ID - printk_info("if the IO APIC device doesn't support 256 apic id, \r\n you need to set ENABLE_APIC_EXT_ID in auto.c so you can spare 16 id for ioapic\r\n"); + printk_info("if the IO APIC device doesn't support 256 apic id, \r\n you need to set CONFIG_ENABLE_APIC_EXT_ID in auto.c so you can spare 16 id for ioapic\r\n"); enable_apic_ext_id(nodes); } diff --git a/src/cpu/amd/dualcore/dualcore.c b/src/cpu/amd/dualcore/dualcore.c index 5a61fac699..331c75909a 100644 --- a/src/cpu/amd/dualcore/dualcore.c +++ b/src/cpu/amd/dualcore/dualcore.c @@ -19,7 +19,7 @@ static inline unsigned get_core_num_in_bsp(unsigned nodeid) #if SET_NB_CFG_54 == 1 static inline uint8_t set_apicid_cpuid_lo(void) { -#if K8_REV_F_SUPPORT == 0 +#if CONFIG_K8_REV_F_SUPPORT == 0 if(is_cpu_pre_e0()) return 0; // pre_e0 can not be set #endif @@ -56,7 +56,7 @@ static inline void start_other_cores(void) unsigned nodes; unsigned nodeid; - if (HAVE_OPTION_TABLE && + if (CONFIG_HAVE_OPTION_TABLE && read_option(CMOS_VSTART_dual_core, CMOS_VLEN_dual_core, 0) != 0) { return; // disable dual_core } @@ -70,7 +70,7 @@ static inline void start_other_cores(void) } } -#if USE_DCACHE_RAM == 0 +#if CONFIG_USE_DCACHE_RAM == 0 static void do_k8_init_and_stop_secondaries(void) { struct node_core_id id; @@ -106,22 +106,22 @@ static void do_k8_init_and_stop_secondaries(void) pci_write_config32(dev_f0, 0x68, val); /* Set the lapicid */ - #if (ENABLE_APIC_EXT_ID == 1) + #if (CONFIG_ENABLE_APIC_EXT_ID == 1) unsigned initial_apicid = get_initial_apicid(); - #if LIFT_BSP_APIC_ID == 0 + #if CONFIG_LIFT_BSP_APIC_ID == 0 if( initial_apicid != 0 ) // other than bsp #endif { /* use initial apic id to lift it */ uint32_t dword = lapic_read(LAPIC_ID); dword &= ~(0xff<<24); - dword |= (((initial_apicid + APIC_ID_OFFSET) & 0xff)<<24); + dword |= (((initial_apicid + CONFIG_APIC_ID_OFFSET) & 0xff)<<24); lapic_write(LAPIC_ID, dword); } - #if LIFT_BSP_APIC_ID == 1 - bsp_apicid += APIC_ID_OFFSET; + #if CONFIG_LIFT_BSP_APIC_ID == 1 + bsp_apicid += CONFIG_APIC_ID_OFFSET; #endif #endif |