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authorElyes HAOUAS <ehaouas@noos.fr>2017-06-27 22:54:42 +0200
committerStefan Reinauer <stefan.reinauer@coreboot.org>2017-06-28 00:23:32 +0000
commit168ef399c43ad79a40a8bbb2de921a2bd906b3f5 (patch)
tree16613245bebd7920cf3e7ce41f0d7bb5441f05e2 /src/cpu/amd/dualcore/amd_sibling.c
parent70083a1de9e12d8dbd3ba70e7a36a7282090f0e0 (diff)
cpu/*: Add whitespace around '<<'
Change-Id: Id46c0b57bd7c9b954b29537c70254df947690e0b Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/20397 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/cpu/amd/dualcore/amd_sibling.c')
-rw-r--r--src/cpu/amd/dualcore/amd_sibling.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/cpu/amd/dualcore/amd_sibling.c b/src/cpu/amd/dualcore/amd_sibling.c
index 1c003c8319..693ceb87cd 100644
--- a/src/cpu/amd/dualcore/amd_sibling.c
+++ b/src/cpu/amd/dualcore/amd_sibling.c
@@ -59,7 +59,7 @@ static void enable_apic_ext_id(int nodes)
uint32_t val;
dev = dev_find_slot(0, PCI_DEVFN(0x18+nodeid, 0));
val = pci_read_config32(dev, 0x68);
- val |= (1<<17)|(1<<18);
+ val |= (1 << 17)|(1 << 18);
pci_write_config32(dev, 0x68, val);
}
}
@@ -84,7 +84,7 @@ unsigned get_apicid_base(unsigned ioapic_num)
if (bsp_apic_id > 0) { // IOAPIC could start from 0
return 0;
- } else if (pci_read_config32(dev, 0x68) & ( (1<<17) | (1<<18)) ) { // enabled ext id but bsp = 0
+ } else if (pci_read_config32(dev, 0x68) & ( (1 << 17) | (1 << 18)) ) { // enabled ext id but bsp = 0
return 1;
}