diff options
| author | Timothy Pearson <tpearson@raptorengineeringinc.com> | 2015-07-30 14:07:15 -0500 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2015-11-18 17:14:48 +0100 |
| commit | 0122afb6093849102caa9662ac14380a41cfb094 (patch) | |
| tree | d56b9de53c5354f22f48bc7ed1990f1280ae1405 /src/cpu/amd/car | |
| parent | 631c8a269006bb8f02860606d35f8d6590954f5e (diff) | |
cpu/amd/fam10h-fam15h: Update Fam15h APIC config and startup sequence
This fixes Family 15h multiple package support; the previous code
hung in CAR setup and romstage when more than one CPU package was
installed for a variety of loosely related reasons.
TEST: Booted ASUS KGPE-D16 with two Opteron 6328 processors
and several different RDIMM configurations.
Change-Id: I171197c90f72d3496a385465937b7666cbf7e308
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: http://review.coreboot.org/12020
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Diffstat (limited to 'src/cpu/amd/car')
| -rw-r--r-- | src/cpu/amd/car/cache_as_ram.inc | 17 |
1 files changed, 16 insertions, 1 deletions
diff --git a/src/cpu/amd/car/cache_as_ram.inc b/src/cpu/amd/car/cache_as_ram.inc index cbb1e39854..53056038b7 100644 --- a/src/cpu/amd/car/cache_as_ram.inc +++ b/src/cpu/amd/car/cache_as_ram.inc @@ -548,8 +548,23 @@ CAR_FAM10_ap: /* Fam10h NB config bit 54 was not set */ rolb %cl, %bl roll_cfg: + jmp_if_not_fam15h(ap_apicid_ready) + cmp $0x5, %ecx + jne ap_apicid_ready - /* Calculate stack pointer. */ + /* This is a multi-node CPU + * Adjust the maximum APIC ID to a more reasonable value + * given that no 32-core Family 15h processors exist + */ + movl %ebx, %ecx + and $0x0f, %ecx /* Get lower 4 bits of CPU number */ + and $0x60, %ebx /* Get node ID */ + shrl $0x1, %ebx /* Shift node ID part of APIC ID down by 1 */ + or %ecx, %ebx /* Recombine node ID and CPU number */ + +ap_apicid_ready: + + /* Calculate stack pointer using adjusted APIC ID stored in ebx */ movl $CacheSizeAPStack, %eax mull %ebx movl $(CacheBase + (CacheSize - (CacheSizeBSPStack + CacheSizeBSPSlush))), %esp |