diff options
author | Patrick Georgi <patrick.georgi@coresystems.de> | 2009-04-30 07:07:22 +0000 |
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committer | Patrick Georgi <patrick.georgi@coresystems.de> | 2009-04-30 07:07:22 +0000 |
commit | 12aba82e55c02470ed80b7682efa8b4e8f702bc1 (patch) | |
tree | f48156a0a625fdd9d7358e6a172a5cdb343ca9a7 /src/cpu/amd/car/copy_and_run.c | |
parent | a43ee75d9a7dc859292b186f22ac0550f149a0a3 (diff) |
Refactor copy_and_run so that it uses a single code base instead of
3 (with one of them way too much assembler code).
On the way, I had to make some changes to the way the code is built,
which is an effort I want to expand over time.
Right now, large portions of the in-ROM part of coreboot is compiled as
a single file, with lots of .c files including other .c files.
That has its justification for pre-raminit code, but it also affects
lots of post-raminit code (memcpy doesn't really make sense before
raminit, or at least CAR)
The coreboot_apc code (AMD boards) gained some .c includes because I
don't know that part of the code enough to really rework it and only
have limited possibilities to test it. The includes should give an
identical situation for this part of the code.
This change was posted as set of 6 patches to the list, but they
were mostly split for review purposes, hence commit them all at once.
They can still be backed up using the patch files, if necessary.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4233 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/cpu/amd/car/copy_and_run.c')
-rw-r--r-- | src/cpu/amd/car/copy_and_run.c | 111 |
1 files changed, 14 insertions, 97 deletions
diff --git a/src/cpu/amd/car/copy_and_run.c b/src/cpu/amd/car/copy_and_run.c index 80fc84072b..e0fa098833 100644 --- a/src/cpu/amd/car/copy_and_run.c +++ b/src/cpu/amd/car/copy_and_run.c @@ -2,119 +2,36 @@ moved from nrv2v.c and some lines from crt0.S 2006/05/02 - stepan: move nrv2b to an extra file. */ -static inline void print_debug_cp_run(const char *strval, uint32_t val) -{ -#if CONFIG_USE_PRINTK_IN_CAR - printk_debug("%s%08x\r\n", strval, val); -#else - print_debug(strval); print_debug_hex32(val); print_debug("\r\n"); -#endif -} -#if CONFIG_COMPRESS -#define ENDIAN 0 -#define BITSIZE 32 -#include "lib/nrv2b.c" -#endif +void copy_and_run_core(u8 *src, u8 *dst, unsigned long ilen, unsigned ebp); +extern u8 _liseg, _iseg, _eiseg; static void copy_and_run(void) { uint8_t *src, *dst; - unsigned long ilen, olen; - - -#if !CONFIG_COMPRESS - print_debug("Copying coreboot to RAM.\r\n"); - __asm__ volatile ( - "leal _liseg, %0\n\t" - "leal _iseg, %1\n\t" - "leal _eiseg, %2\n\t" - "subl %1, %2\n\t" - : "=a" (src), "=b" (dst), "=c" (olen) - ); - memcpy(dst, src, olen); -#else - print_debug("Uncompressing coreboot to RAM.\r\n"); - - __asm__ volatile ( - "leal _liseg, %0\n\t" - "leal _iseg, %1\n\t" - : "=a" (src) , "=b" (dst) - ); - - print_debug_cp_run("src=",(uint32_t)src); - print_debug_cp_run("dst=",(uint32_t)dst); - -// dump_mem(src, src+0x100); - - olen = unrv2b(src, dst, &ilen); - print_debug_cp_run("coreboot_ram.nrv2b length = ", ilen); - -#endif -// dump_mem(dst, dst+0x100); - - print_debug_cp_run("coreboot_ram.bin length = ", olen); + unsigned long ilen; - print_debug("Jumping to coreboot.\r\n"); - - __asm__ volatile ( - "xorl %ebp, %ebp\n\t" /* cpu_reset for hardwaremain dummy */ - "cli\n\t" - "leal _iseg, %edi\n\t" - "jmp *%edi\n\t" - ); + src = &_liseg; + dst = &_iseg; + ilen = &_eiseg - dst; + copy_and_run_core(src, dst, ilen, 0); } #if CONFIG_AP_CODE_IN_CAR == 1 +extern u8 _liseg_apc, _iseg_apc, _eiseg_apc; + static void copy_and_run_ap_code_in_car(unsigned ret_addr) { uint8_t *src, *dst; - unsigned long ilen, olen; - -// print_debug("Copying coreboot AP code to CAR.\r\n"); - -#if !CONFIG_COMPRESS - __asm__ volatile ( - "leal _liseg_apc, %0\n\t" - "leal _iseg_apc, %1\n\t" - "leal _eiseg_apc, %2\n\t" - "subl %1, %2\n\t" - : "=a" (src), "=b" (dst), "=c" (olen) - ); - memcpy(dst, src, olen); -#else - - __asm__ volatile ( - "leal _liseg_apc, %0\n\t" - "leal _iseg_apc, %1\n\t" - : "=a" (src) , "=b" (dst) - ); - -// print_debug_cp_run("src=",(uint32_t)src); -// print_debug_cp_run("dst=",(uint32_t)dst); - -// dump_mem(src, src+0x100); - - olen = unrv2b(src, dst, &ilen); -// print_debug_cp_run("coreboot_apc.nrv2b length = ", ilen); - -#endif -// dump_mem(dst, dst+0x100); - -// print_debug_cp_run("coreboot_apc.bin length = ", olen); - -// print_debug("Jumping to coreboot AP code in CAR.\r\n"); + unsigned long ilen; - __asm__ volatile ( - "movl %0, %%ebp\n\t" /* cpu_reset for hardwaremain dummy */ - "cli\n\t" - "leal _iseg_apc, %%edi\n\t" - "jmp *%%edi\n\t" - :: "a"(ret_addr) - ); + src = &_liseg_apc; + dst = &_iseg_apc; + ilen = &_eiseg_apc - dst; + copy_and_run_core(src, dst, ilen, ret_addr); } #endif |