diff options
author | Yinghai Lu <yinghailu@gmail.com> | 2006-05-04 00:58:14 +0000 |
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committer | Yinghai Lu <yinghailu@gmail.com> | 2006-05-04 00:58:14 +0000 |
commit | 52377deec00798261a09bac6263291f9461756bb (patch) | |
tree | 5001f227107920a948d53cc42756155aab502fbd /src/cpu/amd/car/clear_init_ram.c | |
parent | b73fd5648838eeb92f2d3255db8740f2fbd10442 (diff) |
core range and set_init_ram_access
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2294 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/cpu/amd/car/clear_init_ram.c')
-rw-r--r-- | src/cpu/amd/car/clear_init_ram.c | 45 |
1 files changed, 2 insertions, 43 deletions
diff --git a/src/cpu/amd/car/clear_init_ram.c b/src/cpu/amd/car/clear_init_ram.c index 593c0ddfd6..ff05f0d439 100644 --- a/src/cpu/amd/car/clear_init_ram.c +++ b/src/cpu/amd/car/clear_init_ram.c @@ -11,49 +11,8 @@ static void __attribute__((noinline)) clear_init_ram(void) } /* be warned, this file will be used by core other than core 0/node 0 or core0/node0 when cpu_reset*/ -static inline __attribute__((always_inline)) void set_init_ram_access(void) +static void set_init_ram_access(void) { - __asm__ volatile ( - - "pushl %%ecx\n\t" - "pushl %%edx\n\t" - "pushl %%eax\n\t" - - /* enable caching for first 1M using variable mtrr */ - "movl $0x200, %%ecx\n\t" - "xorl %%edx, %%edx\n\t" - "movl $(0 | 6), %%eax\n\t" -// "movl $(0 | MTRR_TYPE_WRBACK), %%eax\n\t" - "wrmsr\n\t" - - "movl $0x201, %%ecx\n\t" - "movl $0x0000000f, %%edx\n\t" -#if CONFIG_USE_INIT - "movl %%esi, %%eax\n\t" -#else - "movl $((~(( 0 + (CONFIG_LB_MEM_TOPK<<10) ) -1)) | 0x800), %%eax\n\t" -#endif - "wrmsr\n\t" - -#if 0 - /* enable caching for 64K using fixed mtrr */ - "movl $0x26e, %%ecx\n\t" /* fix4k_f0000*/ - "movl $0x1e1e1e1e, %%eax\n\t" /* WB MEM type */ - "movl %%eax, %%edx\n\t" - "wrmsr\n\t" - "movl $0x26f, %%ecx\n\t" /* fix4k_f8000*/ - "wrmsr\n\t" -#endif - - "popl %%eax\n\t" - "popl %%edx\n\t" - "popl %%ecx\n\t" - - : - : -#if CONFIG_USE_INIT - "S"((~(( 0 + (CONFIG_LB_MEM_TOPK<<10) ) -1)) | 0x800) -#endif - ); + set_var_mtrr(0, 0x00000000, CONFIG_LB_MEM_TOPK << 10, MTRR_TYPE_WRBACK); } |