diff options
author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2015-01-09 23:48:47 +0200 |
---|---|---|
committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2015-01-10 13:53:51 +0100 |
commit | 78c5d584a087265e44b076647db19efd4db4a7bb (patch) | |
tree | 0f5e32c90cf0fb17db36d514baf6afc9c037d728 /src/cpu/amd/agesa | |
parent | 2320cbebc667ac6871d4d6c8b59fee27ba6e75e5 (diff) |
ACPI: Add acpi_is_wakeup_s3() for romstage
This replaces acpi_is_wakeup_early().
Change-Id: I23112c1fc7b6f99584bc065fbf6b10fb073b1eb6
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/8187
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Diffstat (limited to 'src/cpu/amd/agesa')
-rw-r--r-- | src/cpu/amd/agesa/heapmanager.c | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/src/cpu/amd/agesa/heapmanager.c b/src/cpu/amd/agesa/heapmanager.c index 50ec3ffc51..cc53d35662 100644 --- a/src/cpu/amd/agesa/heapmanager.c +++ b/src/cpu/amd/agesa/heapmanager.c @@ -12,13 +12,11 @@ UINT32 GetHeapBase(AMD_CONFIG_PARAMS *StdHeader) { UINT32 heap = BIOS_HEAP_START_ADDRESS; -#if CONFIG_HAVE_ACPI_RESUME - /* Both romstage and ramstage has this S3 detect. */ - if (acpi_get_sleep_type() == 3) + if (acpi_is_wakeup_s3()) heap = (UINT32) cbmem_find(CBMEM_ID_RESUME_SCRATCH) + (CONFIG_HIGH_SCRATCH_MEMORY_SIZE - BIOS_HEAP_SIZE); /* himem_heap_base + high_stack_size */ -#endif + return heap; } |