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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2016-04-19 07:17:59 +0300 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2016-05-18 10:44:43 +0200 |
| commit | 08311f5033e3adccb8794b6113d72bf7a76e4d00 (patch) | |
| tree | aaf0d1ca6cacf2d5a73e45dc9f9193417a4b10fc /src/cpu/amd/agesa | |
| parent | 82171ea0ff9e38462e813b791dd57c8ad95dc768 (diff) | |
AGESA vendorcode: Build a common amdlib
Having CFLAGS with -Os disables -falign-function, for
unlucky builds this may delay entry to ramstage by 600ms.
Build the low-level IO functions aligned with -O2 instead.
Change-Id: Ice6781666a0834f1e8e60a0c93048ac8472f27d9
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/14414
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/cpu/amd/agesa')
| -rw-r--r-- | src/cpu/amd/agesa/family15/fixme.c | 29 |
1 files changed, 29 insertions, 0 deletions
diff --git a/src/cpu/amd/agesa/family15/fixme.c b/src/cpu/amd/agesa/family15/fixme.c index 04162e2c6d..5633007e91 100644 --- a/src/cpu/amd/agesa/family15/fixme.c +++ b/src/cpu/amd/agesa/family15/fixme.c @@ -17,6 +17,35 @@ #include <northbridge/amd/agesa/agesawrapper.h> #include "amdlib.h" +UINT64 +MsrRead ( + IN UINT32 MsrAddress + ); + +VOID +MsrWrite ( + IN UINT32 MsrAddress, + IN UINT64 Value + ); + + +UINT64 +MsrRead ( + IN UINT32 MsrAddress + ) +{ + return __readmsr (MsrAddress); +} + +VOID +MsrWrite ( + IN UINT32 MsrAddress, + IN UINT64 Value + ) +{ + __writemsr (MsrAddress, Value); +} + #if !IS_ENABLED(CONFIG_BOARD_AMD_DINAR) void amd_initcpuio(void) { |