diff options
author | Martin Roth <martinroth@google.com> | 2017-02-09 17:23:55 -0800 |
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committer | Martin Roth <martinroth@google.com> | 2017-02-22 22:22:49 +0100 |
commit | 869532264a20801a58ccfb4bbca1b52d015a959f (patch) | |
tree | 1b1b7cd0bbc98ac8ee5172bde010ddffb12e71dc /src/cpu/amd/agesa | |
parent | bf4845dd3acf3ce9e9c63ce8c35ee7111351aa78 (diff) |
src/cpu/amd: Update/Add license headers to all files
Change-Id: I1e0b2b9086db6b3c2f716d9400a83eb60b2ce222
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/18403
Tested-by: build bot (Jenkins)
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/cpu/amd/agesa')
-rw-r--r-- | src/cpu/amd/agesa/family15tn/udelay.c | 21 |
1 files changed, 17 insertions, 4 deletions
diff --git a/src/cpu/amd/agesa/family15tn/udelay.c b/src/cpu/amd/agesa/family15tn/udelay.c index 5873237b0c..cc673e2d6e 100644 --- a/src/cpu/amd/agesa/family15tn/udelay.c +++ b/src/cpu/amd/agesa/family15tn/udelay.c @@ -1,10 +1,23 @@ /* - * udelay() impementation for SMI handlers - * This is neat in that it never writes to hardware registers, and thus does not - * modify the state of the hardware while servicing SMIs. + * This file is part of the coreboot project. * * Copyright (C) 2014 Alexandru Gagniuc <mr.nuke.me@gmail.com> - * Subject to the GNU GPL v2, or (at your option) any later version. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* + * udelay() impementation for SMI handlers + * This is neat in that it never writes to hardware registers, and thus does + * not modify the state of the hardware while servicing SMIs. */ #include <cpu/x86/msr.h> |