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authorElyes HAOUAS <ehaouas@noos.fr>2020-02-24 13:43:39 +0100
committerPatrick Georgi <pgeorgi@google.com>2020-03-04 15:43:30 +0000
commit79ccc6933284ca02d17d9e1eda9a531ce43e1f65 (patch)
tree49fe1b78916338575b1a6bec931e2fb885cc311a /src/cpu/amd/agesa
parentf3161df2eba8d61445372a9c732c61a1947064bd (diff)
src: capitalize 'PCIe'
Change-Id: I55bbb535372dc9af556b95ba162f02ffead2b9e2 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39101 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/cpu/amd/agesa')
-rw-r--r--src/cpu/amd/agesa/family14/fixme.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/cpu/amd/agesa/family14/fixme.c b/src/cpu/amd/agesa/family14/fixme.c
index be7c635471..658434d2c8 100644
--- a/src/cpu/amd/agesa/family14/fixme.c
+++ b/src/cpu/amd/agesa/family14/fixme.c
@@ -100,7 +100,7 @@ void amd_initenv(void)
PciValue |= 0x80000000;
LibAmdPciWrite(AccessWidth32, PciAddress, &PciValue, &AmdParamStruct.StdHeader);
- /* Initialize GMM Base Address for Pcie Mode
+ /* Initialize GMM Base Address for PCIe Mode
* Modify B0D1F0x18
*/
PciAddress.Address.Bus = 0;
@@ -112,7 +112,7 @@ void amd_initenv(void)
PciValue |= 0x96000000;
LibAmdPciWrite(AccessWidth32, PciAddress, &PciValue, &AmdParamStruct.StdHeader);
- /* Initialize FB Base Address for Pcie Mode
+ /* Initialize FB Base Address for PCIe Mode
* Modify B0D1F0x10
*/
PciAddress.Address.Register = 0x10;